By adopting the new design of the optics within the scanner, high-NA (0.55NA) EUV lithography enables higher resolution, which will push the EUV single patterning down to pitch 16nm (k1=0.34, the same k1 value as pitch 28nm for 0.33NA EUV single patterning). Therefore, 0.55NA EUVL is projected to print the most critical features of 2nm node (and beyond) logic chips with less patterning steps than 0.33NA EUVL, and is highly expected by the industry. Besides, novel low-n low-k absorber attenuated phase shift masks (low-n attPSMs) are commercially available recently, which have shown substantial imaging, as well as patterning performance improvements both in simulations and experiments. Thus, in this paper, we evaluate the feasibility and limits of logic metal scaling with 0.55NA EUV single pattering using source mask optimization tool, both binary and low-n attPSMs are used to pattern an imec N3 (pitch 28nm, foundry N2 equivalent) random logic metal design and the linear scaled versions (down to pitch 18nm). The impact of design orientations (horizontal vs. vertical) and mask tones (dark field vs. bright field) on patterning fidelity and overall process window is evaluated.
Extending 0.33 NA extreme ultraviolet single patterning to 28-nm pitch becomes challenging in stochastic defectivity, which demands high-contrast lithographic images. The low-n attenuated phase-shift mask (attPSM) can provide superior solutions for individual pitches by mitigating mask three-dimensional effects. The simulation and experiment results have shown substantial imaging improvements: higher depth of focus at similar normalized image log slope and smaller telecentricity error values than the best binary mask configuration. In this work, the exploration of low-n attPSM patterning opportunity for pitch 28-nm metal design is investigated. Using generic building block features, the lithographic performance of the low-n attPSM is compared with the standard binary Ta-based absorber mask. In addition, the impact of mask tone (bright field (BF) versus dark field) on the pattern fidelity and process window is evaluated both by simulations and experiments. The results indicate that BF low-n attPSM provides the best patterning performance. Consequently, the BF low-n attPSM patterning performance is assessed with an actual imec N3 pitch 28-nm random logic metal design. The wafer data indicate BF low-n attPSM enables good patterning fidelity, as well as good overall process window with high exposure latitude (∼20%).
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