Thermal scanning probe lithography is used for creating lithographic patterns with 27.5 nm half-pitch line density in a 50 nm thick high carbon content organic resist on a Si substrate. The as-written patterns in the poly phthaladehyde thermal resist layer have a depth of 8 nm, and they are transformed into high-aspect ratio binary patterns in the high carbon content resist using a SiO2 hard-mask layer with a thickness of merely 4 nm and a sequence of selective reactive ion etching steps. Using this process, a line-edge roughness after transfer of 2.7 nm (3σ) has been achieved. The patterns have also been transferred into 50 nm deep structures in the Si substrate with excellent conformal accuracy. The demonstrated process capabilities in terms of feature density and line-edge roughness are in accordance with today's requirements for maskless lithography, for example for the fabrication of extreme ultraviolet (EUV) masks.

Existing techniques for electron- and ion-beam lithography, routinely employed for nanoscale device fabrication and mask/mold prototyping, do not simultaneously achieve efficient (low fluence) exposure and high resolution. We report lithography using neon ions with fluence <1 ion/nm(2), ∼1000× more efficient than using 30 keV electrons, and resolution down to 7 nm half-pitch. This combination of resolution and exposure efficiency is expected to impact a wide array of fields that are dependent on beam-based lithography.

Abstract:We fabricated 9 to 30 nm half-pitch nested Ls and 13 to 15 nm half-pitch dot arrays, using 2 keV electron-beam lithography with hydrogen silsesquioxane (HSQ) as the resist. All structures with 15 nm half-pitch and above were fully resolved. We observed that the 9 and 10-nm half-pitch nested L's and the 13-nm-half-pitch dot array contained some resist residues. We obtained good agreement between experimental and Monte-Carlo-simulated point-spread functions at energies of 1.5, 2, and 3 keV. The longrange proximity effect was minimal, as indicated by simulated and patterned 30 nm holes in negative-tone resist.

Abstract:We integrated superconducting nanowire single-photon detectors on sub-400-nm-thick silicon nitride membranes, which can then be transferred and aligned to photonic structures on a secondary chip with sub-micron placement accuracy. [5][6][7] were only compatible with a handful of substrate materials and required additional fabrication steps on the sample. These steps can be incompatible with complex photonic integrated circuits (PICs). Based on a micron-scale flip-chip concept [8], we have developed a technology that enables integration of SNSPDs on PICs without exposing the PIC to chemicals or high temperatures. We used this method to integrate SNSPDs with silicon waveguides designed for 1550 nm center wavelength.The scanning electron micrograph (SEM) of a waveguide-SNSPD consisting of 95-nm-wide nanowires arranged in a 200-nm-pitch meander pattern is shown in Fig. 1. The nanowires were fabricated by patterning a NbN film grown on top of a SiN x -on-Si substrate. The thickness of the SiN x layer was 350 nm. The NbN layer, grown using reactive magnetron sputtering of Nb in Ar/N 2 plasma at 800 ºC substrate temperature, had a sheet resistance of ~ 500 Ω/square and a critical temperature of 10.5 K. The size of the detector (marked in yellow in Fig. 1(a)) was constrained by the accuracy of membrane placement (± 0.5 μm), the width of the waveguide (~ 0.5 μm) and the minimum meander length (min. L M ) required to reach > 90 % optical absorption in the detector when placed on a waveguide. The results of the COMSOL simulation [9] used to calculate L M are shown in Fig. 1(d). Furthermore it was assumed that the waveguide and the SNSPD were separated by a 20-nm-thick HSQ layer (residual resist from previous lithography steps).