Thermal Probe Maskless Lithography for 27.5 nm Half-Pitch Si Technology

Cheong, Lin Lee; Paul, P.; Holzner, Felix; Despont, M.; Coady, Daniel J.; Hedrick, James L.; Allen, Robert D.; Knoll, Armin; Duerig, Urs

doi:10.1021/nl4024066

Cited by 75 publications

(69 citation statements)

References 26 publications

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“…The obtained value for the 3 σ line edge roughness of 2.9 ± 0.5 nm is in agreement with the results obtained previously for 27.5 nm lines and spaces 7 . In this previous work we found that the LER was inversely proportional to the slope of the topographic patterns.…”

Section: Resultssupporting

confidence: 92%

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Sub-20 nm silicon patterning and metal lift-off using thermal scanning probe lithography

Wolf

Rawlings

Mensch

et al. 2014

Journal of Vacuum Science &Amp; Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phen

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The most direct definition of a patterning process' resolution is the smallest half-pitch feature it is capable of transferring onto the substrate. Here we demonstrate that thermal Scanning Probe Lithography (t-SPL) is capable of fabricating dense line patterns in silicon and metal lift-off features at sub 20 nm feature size. The dense silicon lines were written at a half pitch of 18.3 nm to a depth of 5 nm into a 9 nm polyphthalaldehyde thermal imaging layer by t-SPL. For processing we used a three-layer stack comprising an evaporated SiO 2 hardmask which is just 2-3 nm thick. The hardmask is used to amplify the pattern into a 50 nm thick polymeric transfer layer. The transfer layer subsequently serves as an etch mask for transfer into silicon to a depth of ≈ 65 nm. The line edge roughness (3 σ) was evaluated to be less than 3 nm both in the transfer layer and in silicon. We also demonstrate that a similar three-layer stack can be used for metal lift-off of high resolution patterns. A device application is demonstrated by fabricating 50 nm half pitch dense nickel contacts to an InAs nanowire.

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Section: Resultssupporting

confidence: 92%

“…Conversely thermal evaporation of SiO 2 on PMMA resulted in very smooth films, R a = 0.23 nm. Third, on the sputtered oxide we had to use a minimal imaging resist thickness of 20 nm in order to achieve a patterning depth of more than 5 nm 7,17 . On the evaporated oxide the thickness of the PPA imaging resist could be reduced to 9 nm.…”

Section: Introductionmentioning

confidence: 99%

Sub-20 nm silicon patterning and metal lift-off using thermal scanning probe lithography

Wolf

Rawlings

Mensch

et al. 2014

Journal of Vacuum Science &Amp; Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phen

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“…2b). Patterning at a half pitch down to 10 nm without proximity corrections was demonstrated 27 . Other milestones towards technical readiness of the technique are the stitching of patterning fields at < 10 nm precision 30 and a high-quality pattern transfer into the underlying silicon substrate at high resolution and low line edge roughness (Fig.…”

Section: Thermal and Thermochemical Splmentioning

confidence: 99%

Advanced scanning probe lithography

2014

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The nanoscale control afforded by scanning probe microscopes has prompted the development of a wide variety of scanning probe-based patterning methods. Some of these methods have demonstrated a high degree of robustness and patterning capabilities that are unmatched by other lithographic techniques. However, the limited throughput of scanning probe lithography has prevented their exploitation in technological applications. Here, we review the fundamentals of scanning probe lithography and its use in materials science and nanotechnology. We focus on the methods and processes that offer genuinely lithography capabilities such as those based on thermal effects, chemical reactions and voltage-induced processes. Published in:Nature Nanotechnology 9, 577-587 (2014) Progress in nanotechnology depends on the capability to fabricate, position, and interconnect nanometre-scale structures. A variety of materials and systems such as nanoparticles, nanowires, two-dimensional materials like graphene and transition metal dichalcogenides, plasmonics materials, conjugated polymers and organic semiconductors are finding applications in nanoelectronics, nanophotonics, organic electronics and biomedical applications. The success of many of the above applications relies on the existence of suitable nanolithography approaches. However, patterning materials with nanoscale features aimed at improving integration and device performance poses several challenges. The limitations of conventional lithography techniques related to resolution, operational costs and lack of flexibility to pattern organic and novel materials have motivated the development of unconventional fabrication methods [1][2][3] .Since the first patterning experiments performed with a scanning probe microscope in the late 80s, scanning probe lithography (SPL) has emerged as an alternative lithography for academic research that combines nanoscale feature-size, relatively low technological requirements and the ability to handle soft matter from small organic molecules to proteins and polymers. Scanning probe lithography experiments have provided striking examples of its capabilities such as the ability to pattern 3D structures with nanoscale features 4 , the fabrication of the smallest field-effect transistor 5 or the patterning of proteins with 10 nm feature size 6 . Figure 1a shows a general scheme of SPL operation. There is a variety of approaches to modify a material in a probe-surface interface which have generated several SPL methods. Scanning probe lithographies can be either classified by emphasizing the distinction between the general nature of the process, chemical versus physical, or by considering if SPL implies the removal or addition of material. However, we consider it is more inclusive and systematic to classify the different SPL methods in terms of the driving mechanisms used in the patterning process, namely thermal, electrical, mechanical and diffusive methods (Fig. 1b). Challenges in nanoscale lithographyThe workhorse of large volume CMOS fabrication, o...

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“…The smallest half-pitch feature of ~18 nm for a pattern transfer into Si for up to 65-nmdeep trenches which only have an edge roughness of 3 nm [130,131].…”

Section: Tip Nano-writingmentioning

confidence: 99%

Tipping solutions: emerging 3D nano-fabrication/ -imaging technologies

et al. 2017

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The evolution of optical microscopy from an imaging technique into a tool for materials modification and fabrication is now being repeated with other characterization techniques, including scanning electron microscopy (SEM), focused ion beam (FIB) milling/imaging, and atomic force microscopy (AFM). Fabrication and in situ imaging of materials undergoing a three-dimensional (3D) nano-structuring within a 1−100 nm resolution window is required for future manufacturing of devices. This level of precision is critically in enabling the cross-over between different device platforms (e.g. from electronics to micro-/ nano-fluidics and/or photonics) within future devices that will be interfacing with biological and molecular systems in a 3D fashion. Prospective trends in electron, ion, and nano-tip based fabrication techniques are presented.

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Thermal Probe Maskless Lithography for 27.5 nm Half-Pitch Si Technology

Cited by 75 publications

References 26 publications

Sub-20 nm silicon patterning and metal lift-off using thermal scanning probe lithography

Sub-20 nm silicon patterning and metal lift-off using thermal scanning probe lithography

Advanced scanning probe lithography

Tipping solutions: emerging 3D nano-fabrication/ -imaging technologies

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