Wide-gap semiconductors are excellent candidates for next-generation optoelectronic devices, including tunable emitters and detectors. ZnSe nanowire-based devices show great promise in blue emission applications, since they can be easily and reproducibly fabricated. However, their utility is limited by deep level defect states that inhibit optoelectronic device performance. The primary objective of this work is to show how the performance of ZnSe nanowire devices improves when nanowires are subjected to a post-growth anneal treatment in a zinc-rich atmosphere. We use low temperature photoluminescence spectroscopy to determine the primary recombination mechanisms and associated defect states. We then characterize the electronic properties of ZnSe nanowire field effect transistors fabricated from both as-grown and Znannealed nanowires, and measure an order-of-magnitude improvement to the electrical conductivity and mobility after the annealing treatment. We show that annealing reduces the concentration of zinc vacancies, which are responsible for strong compensation and high amounts of scattering in the as-grown nanowires.
Because of the continued scaling of transistor dimensions and incorporation of nanostructured materials into modern electronic and optoelectronic devices, surfaces and interfaces have become a dominant factor dictating material properties and device performance. In this study, we investigate the temperature-dependent electronic transport properties of InAs nanowire field-effect transistors. A point where the nanowire conductance becomes independent of temperature is observed, known as the zero-temperature-coefficient. The distribution of surface states is determined by a spectral analysis of the conductance activation energy and used to develop a carrier transport model that explains the existence and gate voltage dependence of this point. We determine that the position of this point in gate voltage is directly related to the fixed oxide charge on the nanowire surface and demonstrate the utility of this method for studying surface passivations in nanoscale systems by characterizing (NH)S and H plasma surface treatments on InAs nanowires.
Characterizing point defects that produce deep states in nanostructures is imperative when designing next-generation electronic and optoelectronic devices. Light emission and carrier transport properties are strongly influenced by the energy position and concentration of such states. The primary objective of this work is to fingerprint the electronic structure by characterizing the deep levels using a combined optical and electronic characterization, considering ZnSe nanowires as an example. Specifically, we use low temperature photoluminescence spectroscopy to identify the dominant recombination mechanisms and determine the total defect concentration. The carrier concentration and mobility are then calculated from electron transport measurements using single nanowire field effect transistors, and the measured experimental data were used to construct a model describing the types, energies, and ionized fraction of defects and calculate the deviation from stoichiometry. This metrology is hence demonstrated to provide an unambiguous means to determine a material’s electronic structure.
The charge distribution and potential profile of p-n-junctions in thin semiconductor nanowires (NWs) were analyzed. The characteristics of screening in one-dimensional systems result in a specific profile with large electric field at the boundary between the n- and p- regions, and long tails with a logarithmic drop in the potential and charge density. As a result of these tails, the junction properties depend sensitively on the geometry of external contacts and its capacity has an anomalously large value and frequency dispersion. In the presence of an external voltage, electrons and holes in the NWs can not be described by constant quasi-Fermi levels, due to small values of the average electric field, mobility, and lifetime of carriers. Thus, instead of the classical Sah-Noice-Shockley theory, the junction current-voltage characteristic was described by an alternative theory suitable for fast generation-recombination and slow diffusion-drift processes. For the non-uniform electric field in the junction, this theory predicts the forward branch of the characteristic to have a non-ideality factor η several times larger than the values 1 < η < 2 from classical theory. Such values of η have been experimentally observed by a number of researchers, as well as in the present work.
Standard methods for calculating transport parameters in nanoscale field‐effect transistors (FETs), namely carrier concentration and mobility, require a linear connection between the gate voltage and channel conductance; however, this is often not the case. One reason often overlooked is that shifts in chemical and electric potential can partially compensate each other, commonly referred to as quantum capacitance. In nanoscale FETs, capacitance is often unmeasurable and an analytical formula is required, which assumes the conducting channel as metallic and common methods of determining threshold voltage no longer couple properly into transport equations. As present and future FET structures become smaller and have increased channel‐gate coupling, this issue will render standard methods impossible to use. This work discusses the validity of common methods of characterization for nanoscale FETs, develops a universal model to determine transport properties by only measuring the threshold voltage of an FET and presents a new parameter to easily classify FETs as either quantum capacitance‐limited or metallic approximated charge transport. Also considered in this work is electrical hysteresis from trap states and, in combination with the proposed universal model, novel techniques are introduced to measure and remove the errors associated with these effects often ignored in literature.
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