This paper presents a systematic study on a novel 3D (three-dimensional) UV (ultraviolet) lithography apparatus for thick photoresist and a UV lithography process simulation for 3D microstructuring. In order to realize a wide variety of 3D microstructures, the developed proximity 3D UV lithography apparatus adopts the ‘moving mask lithography’ concept which was originally proposed by the authors for deep x-ray lithography. Furthermore, the authors propose a new practical photoresist profile simulation approach adopting the ‘fast marching method’ to consider the photoresist dissolution vector in the development process. A series of moving mask UV lithography experiments using a positive-tone photoresist (50 µm thickness) successfully confirmed (1) the capability of the moving mask UV exposure technique for 3D microstructuring and (2) the validity of the proposed photoresist profile simulation.

Gold nanoparticles with diameters of a few tens of nanometer and a narrow size distribution were synthesized using a pulsed mixing method with a microfluidic system which consists of a Y-shaped mixing microchannel and two piezoelectric valveless micropumps. This mixing method enables control of the mixing speed of gold salts and reducing agent by changing the switching frequency of the micropumps, which was our focus to improve the particle size distribution, which is an essential parameter in gold nanoparticle synthesis. In the proposed method, the mixing time was inversely proportional to the switching frequency and the minimum mixing time was 95 ms at a switching frequency of 200 Hz. During synthesis experiments, the mean diameter of the synthesized gold nanoparticles was found to increase, and the coefficient of variation of particle size was found to decrease with decreasing mixing time. We successfully improved the coefficient of variation to less than 10% for a mean diameter of around 40 nm.

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We present a new rapid prototyping technique without a photolithography step to produce a glass chip with high aspect ratio channel for a micro total analysis system (µTAS). This technique consists of a powder blasting technique and direct laser patterning of Au nanoparticles dispersed polymer mask technique, and is useful in the development stage of a glass chip. The mask thickness and powder blasting condition were optimized for the fabrication of a glass chip with a higher aspect ratio channel. Under the optimized processing condition, the microchannel with a maximum aspect ratio of 2.1 in a glass substrate was successfully realized. The proposed technique was applied to a glass chip for electrophoresis and its performance for DNA separation analysis was confirmed.

This paper reports a differentially detecting capacitive three-axis SOI accelerometer using novel vertical comb electrodes. The accelerometer structure was fabricated by surface-micromachining technique and consists of only the device layer of a SOI wafer without lower or upper electrodes. The bottom faces of both movable and fixed electrodes are in the same plane at their initial positions but those heights are different. It is also an important feature that the device applies fully differential detections in all three-axis by using only two pairs of four type capacitors. As an initial result, the capacitance changes against three-axis acceleration were observed. The capacitance sensitivities to X and Z-axis acceleration against Y-axis rotation were 1.

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Low etching pressure and high silicon substrate temperature successfully decrease the etched surface roughness and the aperture size effect, which represent challenges to the application of silicon etching with XeF2 to the fabrication of microelectromechanical systems (MEMS). The etched roughness and aperture size effect are extremely high and limit factors for the design rules of MEMS devices. In order to express the extent of the aperture size effect, a uniformity of etched depth is defined as follows: (depth at 25 μm)/(depth at 175 μm) × 100%. By lowering the charge pressure from 390 to 65 Pa, the etched roughness decreased from 870.8 and 174.4 Å and the uniformity improved from 71.3 to 88.7%. By increasing the substrate temperature from 300 to 440 K, the etched roughness decreased from 151.4 and 44.5 Å and the uniformity increased from 71.3 to 91.6%. These results will allow us to design with fewer constraints and to expand the field of applications of XeF2 etching to MEMS.

This study evaluated the mechanical properties and piezoresistivity of core–shell silicon carbide nanowires (C/S-SiCNWs) synthesized by a vapor–liquid–solid technique, which are a promising material for harsh environmental micro electromechanical systems (MEMS) applications. The C/S-SiCNWs were composed of a crystalline cubic (3C) SiC core wrapped by an amorphous silicon dioxide (SiOx) shell; however, TEM observations of the NWs showed that hexagonal polytypes (2H, 4H , and 6H) were partially induced in the core by a stacking fault owing to a Shockley partial dislocation. The stress–strain relationship of the C/S-SiCNWs and SiC cores without an SiOx shell was examined using MEMS-based nanotensile tests. The tensile strengths of the C/S-SiCNWs and SiC cores were 7.0 GPa and 22.4 GPa on average, respectively. The lower strength of the C/S-SiCNWs could be attributed to the SiOx shell with the surface roughness as the breaking point. The Young’s modulus of the C/S-SiCNWs was 247.2 GPa on average, whereas that of the SiC cores had a large value with scatter data ranging from 450 to 580 GPa. The geometrical model of the SiC core based on the transmission electron microscopy observations rationalized this scatter data by the volume content of the stacking fault in the core. The piezoresistive effects of the C/S-SiCNW and SiC core were also evaluated from the I–V characteristics under uniaxial tensile strain. The gauge factor of –30.7 at 0.008 ε for the C/S-SiCNW was approximately two-times larger than that of –15.8 at 0.01 ε for the SiC core. This could be caused by an increase of the surface state density at the SiOx/SiC interface owing to the positive fixed oxide charge of the SiOx shell.