In this paper, we introduce the Wireless Open-Access Research Platform (WARP) developed at CMC lab, Rice University. WARP provides a scalable and configurable platform mainly designed to prototype wireless communication algorithms for educational and research oriented applications. Its programmability and flexibility makes it easy to implement various physical and network layer protocols and standards. Moreover, the online open-access WARP repository is used to document and share different wireless architectures and cross-layer designs developed at educational and research centers. This repository is a fast and easy solution for students and researchers with a wide range of backgrounds in hardware implementation and algorithm development to collaborate and initiate multi-disciplinary system designs. WARP Platform ArchitectureRice University's WARP [2] is a scalable, extensible and programmable wireless platform, built from the ground up, to prototype wireless networks. The platform architecture consists of four key components: custom hardware, platform support packages, open-access repository and research applications; all together providing a reconfigurable wireless testbed for students and faculty. Figure 1 shows the WARP board along with four daughtercards. Custom Baseband HardwareTo balance the computational needs of wireless systems operating at hundreds of Mbits/sec with the flexibility and programmability needed for wireless systems, we choose Xilinx Virtex-II Pro FPGAs as the primary communication processor on the main board. The PowerPC processors embedded in the FPGAs provide a complete embedded programming environment for MAC and network layer design. The dedicated multi-gigabit transceivers (MGTs) provide high speed board-to-board connections which make the WARP platform scalable and extendable.One of the main features of WARP hardware, which makes it distinguishable from other similar boards designed for educational purposes, is its four daughtercard slots that can be used to connect radio boards. These radio boards, designed fully by Rice University students, can be attached to the main board so that up to a 4 × 4 multiple-input multipleoutput (MIMO) system can be built. The availability of a multi-antenna radio testbed results in broader educational experiences and opportunities that enable students to understand various aspects of wireless systems such as coding, synchronization, modulation and RF IQ imbalances. Development ToolsFor physical layer design, the platform supports different levels of design flows from low level VHDL/Verilog RTL coding to system level MATLAB modeling. Xilinx "System Generator" is one of the system-level modeling tools integrated in MATLAB that provides abstractions for building and debugging high-performance DSP systems in MAT-LAB/Simulink using the Xilinx Blockset. Moreover, the WARP board supports Simulink "hardware co-simulation" that expedites the simulation and debugging steps.For MAC and network layer design, the WARP platform supports "C" based applica...
Abstract-Using multiple-input multiple-output (MIMO) relays in cooperative communication improves the data rate and reliability of the communication. The MIMO transmission, however, requires considerable resources for the detection in the relay. In particular, if a full detect-and-forward (FDF) strategy is employed, the relay needs to spend considerable resources to perform the full MIMO detection. We propose a novel cooperative partial detection (CPD) strategy to partition the detection task between the relay and the destination. CPD modifies the tree traversal of the tree-based sphere detectors in a way where there is no need to visit all the levels of the tree and only a subset of the levels; thus, a subset of the transmitted streams are visited. The destination, then, combines the source signal and the partial relay signal to perform the final detection step and recover the transmitted vector. We study and compare the performance and complexity of FDF and CPD and show that by using the CPD approach, the relay can avoid the considerable overhead of MIMO detection while helping the source-destination link to improve its performance. More specifically, in the case of a 4 4 system, the relay complexity can be reduced by up to 80% of the conventional relaying scheme.
Spatial division multiplexing (SDM) in MIMO technology significantly increases the spectral efficiency, and hence capacity, of a wireless communication system: it is a core component of the next generation wireless systems, e.g. WiMAX, 3GPP LTE and other OFDM-based communication schemes. Moreover, spatial division multiple access (SDMA) is one of the widely used techniques for sharing the wireless medium between different mobile devices. Sphere detection is a prominent method of simplifying the detection complexity in both SDM and SDMA systems while maintaining BER performance comparable with the optimum maximum-likelihood (ML) detection. On the other hand, with different standards supporting different system parameters, it is crucial for both base station and handset devices to be configurable and seamlessly switch between different modes without the need for separate dedicated hardware units. This challenge emphasizes the need for SDR designs that target the handset devices. In this paper, we propose the architecture and FPGA realization of a configurable sort-free sphere detector, Flex-Sphere, that supports 4, 16, 64-QAM modulations as well as a combination The detector provides a data rate of up to 857.1 Mbps that fits well within the requirements of any of the next generation wireless standards. The algorithmic optimizations employed to produce an FPGA friendly realization are discussed.
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