WARP, a Unified Wireless Network Testbed for Education and Research

Abstract

In this paper, we introduce the Wireless Open-Access Research Platform (WARP) developed at CMC lab, Rice University. WARP provides a scalable and configurable platform mainly designed to prototype wireless communication algorithms for educational and research oriented applications. Its programmability and flexibility makes it easy to implement various physical and network layer protocols and standards. Moreover, the online open-access WARP repository is used to document and share different wireless architectures and cross-layer designs developed at educational and research centers. This repository is a fast and easy solution for students and researchers with a wide range of backgrounds in hardware implementation and algorithm development to collaborate and initiate multi-disciplinary system designs. WARP Platform ArchitectureRice University's WARP [2] is a scalable, extensible and programmable wireless platform, built from the ground up, to prototype wireless networks. The platform architecture consists of four key components: custom hardware, platform support packages, open-access repository and research applications; all together providing a reconfigurable wireless testbed for students and faculty. Figure 1 shows the WARP board along with four daughtercards. Custom Baseband HardwareTo balance the computational needs of wireless systems operating at hundreds of Mbits/sec with the flexibility and programmability needed for wireless systems, we choose Xilinx Virtex-II Pro FPGAs as the primary communication processor on the main board. The PowerPC processors embedded in the FPGAs provide a complete embedded programming environment for MAC and network layer design. The dedicated multi-gigabit transceivers (MGTs) provide high speed board-to-board connections which make the WARP platform scalable and extendable.One of the main features of WARP hardware, which makes it distinguishable from other similar boards designed for educational purposes, is its four daughtercard slots that can be used to connect radio boards. These radio boards, designed fully by Rice University students, can be attached to the main board so that up to a 4 × 4 multiple-input multipleoutput (MIMO) system can be built. The availability of a multi-antenna radio testbed results in broader educational experiences and opportunities that enable students to understand various aspects of wireless systems such as coding, synchronization, modulation and RF IQ imbalances. Development ToolsFor physical layer design, the platform supports different levels of design flows from low level VHDL/Verilog RTL coding to system level MATLAB modeling. Xilinx "System Generator" is one of the system-level modeling tools integrated in MATLAB that provides abstractions for building and debugging high-performance DSP systems in MAT-LAB/Simulink using the Xilinx Blockset. Moreover, the WARP board supports Simulink "hardware co-simulation" that expedites the simulation and debugging steps.For MAC and network layer design, the WARP platform supports "C" based applica...

CRUSH: Cognitive Radio Universal Software Hardware

“…Specifically, we discuss the two most popular SDR platforms, the Universal Software Radio Peripheral (USRP) by Ettus Research [1] and the Wireless Open Access Research Platform (WARP) by Rice University [5]. There are additional SDRs that have been used in research that we do not discuss such as the Berkeley Emulation Engine (BEE) [6] line of products and Networking over White Spaces (KNOWS) by Microsoft Research [7].…”

Implementation of a High Throughput Soft MIMO Detector on GPU

“…The search process can be expressed as a series of edge reductions followed by a series of path extensions. Figure 4 illustrates an example of the search process for L 1 . We start at the root node and perform edge reduction at each vertex in stage 0.…”

“…These types of processors are extremely cost-effective and ubiquitous in mobile and desktop devices. Combined with a short learning curve, GPUs reduce barriers to entry for academic and industrial research groups and enable very fast physical layer simulations as well as replacing custom ASICs or FPGAs on wireless testbed platforms such as WARPLab [1].…”

A MPSoC Prototyping Platform for Flexible Radio Applications

“…Some implementations, such as [6] or [7], use more hardware parts, others such as [8], are closer to pure SDR systems. The WARP platform ( [7], [9], [10]) is a platform developed at Rice University, using an FPGA to implement some DSP functions, and using specific hardware. An open access repository is available, creating a growing developer community.…”