High-heat-flux removal is necessary for next-generation microelectronic systems to operate more reliably and efficiently. Extremely high heat removal rates are achieved in this work using a hierarchical manifold microchannel heat sink array. The microchannels are imbedded directly into the heated substrate to reduce the parasitic thermal resistances due to contact and conduction resistances. Discretizing the chip footprint area into multiple smaller heat sink elements with high-aspect-ratio microchannels ensures shortened effective fluid flow lengths. Phase change of high fluid mass fluxes can thus be accommodated in micron-scale channels while keeping pressure drops low compared to traditional, microchannel heat sinks.A thermal test vehicle, with all flow distribution components heterogeneously integrated, is fabricated to

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Characterization of Hierarchical Manifold Microchannel Heat Sink Arrays Under Simultaneous Background and Hotspot Heating Conditions 1 Kevin P. Drummond (a,c) , Doosan Back (b,c) , Michael D. Sinanis (b,c) , David B. Janes (b,c) , and Dimitrios Peroulis (b,c) , Justin A. Weibel (a,c) , Suresh V. Garimella (a,c)2

High-heat-flux removal is critical for next-generation electronic devices to reliably operate within their temperature limits. A large portion of the thermal resistance in a traditional chip package is caused by thermal resistances at interfaces between the device, heat spreaders, and the heat sink; embedding the heat sink directly into the heat-generating device can eliminate these interface resistances and drastically reduce the overall thermal resistance. Microfluidic cooling within the embedded heat sink improves heat dissipation, with two-phase operation offering the potential for dissipation of very high heat fluxes while maintaining moderate chip temperatures. To enable multi-chip stacking and other heterogeneous packaging approaches, it is important to densely integrate all fluid flow paths into the device; volumetric heat dissipation emerges as a performance metric in this new heat sinking paradigm. In this work, a compact hierarchical manifold microchannel (MMC) design is presented that utilizes an integrated multi-level manifold distributor to feed coolant to an array of microchannel heat sinks. The flow features in the manifold layers and microchannels are fabricated in silicon wafers using deep reactive ion etching. The heat source is simulated via Joule heating using thin-film platinum heaters. On-chip spatial temperature measurements are made using four-wire resistance temperature detectors. Individual manifold layers and the microchannel-bearing wafers are diced and bonded into a sealed stack via thermocompression bonding using gold layers at the mating surfaces. Thermal and hydrodynamic testing is performed by pumping the dielectric fluid HFE-7100 through the device at a known flow rate, temperature, and pressure at different levels of chip heat input. A volumetric heat density of up to 2870 W/cm 3 is dissipated at a chip temperature less than 112 °C and microchannel pressure drop less than 27 kPa. The overall pressure drop is governed by flow through the manifold, rather than the microchannels, in this compact heat sink that occupies envelope of 5 mm × 5 mm × 2.3 mm including all functional flow features.

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