With continuous down scaling of semiconductor devices, poly depletion has become a significant portion of gate dielectric inversion thickness. In an effort to reduce poly depletion, nano-crystalline grained (NCG) silicon has been developed using a rapid thermal chemical vapor deposition process. The grain structures were controlled through varying deposition temperature, pressure and flow rate of gases. NCG silicon formation has been engineered through a new two step process. The structure demonstrated retention of nano-crystalline characteristics with limited grain growth after boron and phosphorous doping and high temperature dopant activation annealing. Higher boron concentration at gate and dielectric interface provides a potential poly depletion reduction of about 1.2 Aå, compared with conventional columnar grained poly- silicon.
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