The sizing of the DC-link capacitor in a three-level inverter is based on the RMS current flowing through it. This paper analyses the DC-link capacitor RMS current in a neutral-point clamped (NPC) inverter and expresses the same as a function of modulation index, line-side current amplitude and power factor. Analytical closed-form expressions are derived for the capacitor RMS current for single-phase half-bridge, single-phase full-bridge and three-phase three-leg topologies of a three-level inverter. The worst-case capacitor current stress is determined for each topology based on the analytical expressions. Further, analytical expressions are derived for the RMS values of low-frequency and high-frequency capacitor currents. These expressions are then used to estimate voltage ripple across the DC capacitor for sinusoidally modulated three-phase NPC inverter. The analytical expressions for the RMS current and voltage ripple are validated experimentally over a wide range of operating points. Keywords. Current control; current stress; diode-clamped inverter; full-bridge inverter; half-bridge inverter; multi-level inverter; proportional-resonant controller; sinusoidal modulation; vector control; voltage ripple.
The voltage ripple and power loss in the DC-capacitor of a voltage source inverter depend on the harmonic currents flowing through the capacitor. This paper presents a double Fourier series based analysis of the harmonic contents of the DC capacitor current in a three-level neutral-point clamped (NPC) inverter, modulated with sine-triangle pulse-width modulation (SPWM) or conventional space vector pulse-width modulation (CSVPWM) schemes. The analytical results are validated experimentally on a 3-kVA three-level inverter prototype. The capacitor current in an NPC inverter has a periodicity of 120 • at the fundamental or modulation frequency. Hence, this current contains third-harmonic and triplen-frequency components, apart from switching frequency components. The harmonic components vary with modulation index and power factor for both PWM schemes. The third harmonic current decreases with increase in modulation index and also decreases with increase in power factor in case of both PWM methods. In general, the third harmonic content is higher with SPWM than with CSVPWM at a given operating condition. Also, power loss and voltage ripple in the DC capacitor are estimated for both the schemes using the current harmonic spectrum and equivalent series resistance (ESR) of the capacitor.
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