The electron mobility in the inversion layer of a metal–oxide semiconductor field effect transistor formed on the (100) silicon surface is calculated by using a Monte Carlo approach which takes into account size quantization, acoustic phonon scattering, intervalley phonon scattering and surface roughness scattering. Degeneracy is also considered because it is important at higher normal effective fields (high gate voltages). The main emphasis is placed on the influence of the specific autocovariance function, used to describe the surface roughness, on the electron mobility. Here we compare the mobilities obtained using exponential and Gaussian autocovariance functions. It is found that the electron mobility calculated with roughness scattering rates based on the exponential function shows good agreement with experiments. The effect of the degeneracy and screening on the roughness scattering is also discussed.

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Monte Carlo simulation is carried out to investigate the high-field transport properties of the two-dimensional electron gas in strained Si/SiGe heterostructures. In the Simulation we take into account the intervalley scattering between twofold and fourfold valleys of an Si well layer split by the tensile Strain, intervalley scatterings within the twofold or fourfold valleys are also incorporated in the simulation as well as the acoustic phonon scattering. We obtained an electron drift velocity at room temperature as high as 1 x IO7 cm s-' at 10 kVcm-'. Calculated results of 4.2 and 77 K show negative differential mobility beyond 10 kV cm-'. At 77 K the transient response of the drift velocity shows a remarkable overshoot, reaching about 3 x 1O'cms-' at 0.2 ps at 10 kV cm-'.

New devices are proposed with an operation principle based on the wave function control of two dimensional electron gas in a single quantum well composed of double heterostructures, for example, AlGaAs/GaAs/AlGaAs. Self-consistent calculations indicate that the current channel of the two dimensional electrons can be easily confined in one of the heterojunction surfaces by applying an external voltage. We show that the mechanism has the capability of fabricating high speed logic devices.

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