Thin silicon foils with different crystal orientations were fabricated using the stress induced lift-off (SLiM-cut) method. The thickness of the silicon foils was approximately 40 µm. The 1 1 1 foil had a smoother surface than the 1 0 0 foil. With surface passivation, the minority carrier lifetimes of the 1 0 0 and 1 1 1 silicon foil were 1.0 µs and 1.6 µs, respectively. In this study, 4 cm 2 -thin silicon solar cells with heterojunction structures were fabricated. The energy conversion efficiencies were determined to be 10.74% and 14.74% for the 1 0 0 and 1 1 1 solar cells, respectively. The surface quality of the silicon foils was determined to affect the solar cell character. This study demonstrated that fabricating the solar cell by using silicon foil obtained from the SLiM-cut method is feasible.
Hetero-junction with intrinsic amorphous thin-film (HIT) solar cells has been confirmed to achieve 23% by Sanyo Electric. In literatures, many efforts have been made in the past few years to improve the interface quality with additional annealing steps, and corresponding annealing mechanisms of stretched-exponential-like relaxation behaviors at interface have been fully investigated. Although the know-how and researches of a-Si/c-Si interfaces have been greatly improved, however, there are few studies about annealing effect on HIT solar cell devices. In fabricating HIT solar cells and panels, silver paste metallization and module EVA lamination were implemented above 150 . Therefore, annealing effects on the fabricated devices are necessary to study and they include more phenomena such as interfaces between (n-)p-a-Si/i-a-Si or (n-) p-a-Si/ITO and thin films themselves. It's quite interesting and important to systematically investigate on the annealing of HIT solar cells. In this study, we have demonstrated several annealing conditions on HIT solar cells and summarized the I-V results at various annealing time.Abnormal phenomena in Voc, Jsc, and F.F. after annealing at 200 were observed. We found the F.F. increase sharply at the initial annealing time and then declined after that. On the other hand, Voc increase sharply from 632 mV to 647mV and then kept stead state. The Jsc showed an increase at initial 5 minutes and then a reduction after that. The reasons for the increase of Voc and reduction of F.F. after thermal annealing are primarily attributed to hydrogen desorption within p-a-Si layer. From the dark conductivities measurement results of p-a-Si, they reveal sharply conductance rise after thermal annealing. The conductivities of amorphous silicon depend on defect density within thin film. Similar experiments were implemented at annealing condition of 250 . Higher temperature annealing,250 , also showed the deteriorated trend with annealing time. Therefore, we used the software tool to simulate the experimental results with defect density increase with annealing time. We get the consistent trend between theoretical simulation and experimental results under annealing conditions. 978-1-4244-9965-6/11/$26.00Hetero-junction with intrinsic amorphous thin-film (HIT) solar cells has been confirmed to achieve 23% by Sanyo Electric. In literatures, many efforts have been made in the past few years to improve the interface quality with additional annealing steps, and corresponding annealing mechanism of stretched-exponential-like relaxation behaviors at interface have been fully investigated. Although the know-how and researches of a-Si/c-Si interfaces have been greatly improved, however, there are few studies about annealing effect on HIT solar cell devices. In fabricating HIT solar cells and panels, silver paste metallization and module EVA lamination were implemented above 150 . The annealing effects on the fabricated devices are necessary and they include more phenomena such as interfaces between (n-)p-a-Si/i-a-S...
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