Conventional chopper conditioning amplifiers with a differential architecture are largely inappropriate for the monolithic infrared sensing systems with the requirements of single-ended architecture, low power, and yet low noise and low offset. In this paper, a novel chopper amplifier is proposed to satisfy all the aforesaid requirements. This is achieved by means of a novel chopper demodulator that not only incurs no hardware overhead but also inherently suppresses noise and offset. On the basis of computer simulations, the proposed chopper amplifier features very low input referred noise (15nV/ Hz), very low input referred offset (0.2μV), high Signalto-Noise Ratio (~87dB) and high Common Mode Rejection Ratio (98dB), and dissipates low quiescent current (57.6 A). When compared to reported differential chopper amplifiers, the proposed amplifier depicts very competitive Figure-OfMerit.
This Ph.D. thesis pertains to the investigation, design, and monolithic realization of GHz Digital-to-Analog Converters (DACs). State-of-the-art DACs rely heavily on complex digital approaches (calibrations or dynamic-element-matching (DEM)) to achieve high linearity. However, these DACs undesirably suffer from inherent drawbacks such as high switching noise, long (time) latency, and complex GHz synchronization. Consequently, GS/s DACs with innate accuracy (i.e., without calibrations or DEM) are particularly attractive. However, the design of GS/s DACs with innate accuracy is challenging as it usually involves numerous fine-tuning due to sophisticated (often intractable) design trade-offs and the degraded transistor performance at GHz.Further, the testing and verification of GS/s DACs are challenging because of the difficulty associated with the generation of high-speed digital input patterns.
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