Scaling of silicon (Si) transistors is predicted to fail below 5-nanometer (nm) gate lengths because of severe short channel effects. As an alternative to Si, certain layered semiconductors are attractive for their atomically uniform thickness down to a monolayer, lower dielectric constants, larger band gaps, and heavier carrier effective mass. Here, we demonstrate molybdenum disulfide (MoS) transistors with a 1-nm physical gate length using a single-walled carbon nanotube as the gate electrode. These ultrashort devices exhibit excellent switching characteristics with near ideal subthreshold swing of ~65 millivolts per decade and an On/Off current ratio of ~10 Simulations show an effective channel length of ~3.9 nm in the Off state and ~1 nm in the On state.

Bottom-up synthesized graphene nanoribbons and graphene nanoribbon heterostructures have promising electronic properties for high-performance field-effect transistors and ultra-low power devices such as tunneling field-effect transistors. However, the short length and wide band gap of these graphene nanoribbons have prevented the fabrication of devices with the desired performance and switching behavior. Here, by fabricating short channel (L ch ~ 20 nm) devices with a thin, high-κ gate dielectric and a 9-atom wide (0.95 nm) armchair graphene nanoribbon as the channel material, we demonstrate field-effect transistors with high on-current (I on > 1 μA at V d = −1 V) and high I on /I off ~ 105 at room temperature. We find that the performance of these devices is limited by tunneling through the Schottky barrier at the contacts and we observe an increase in the transparency of the barrier by increasing the gate field near the contacts. Our results thus demonstrate successful fabrication of high-performance short-channel field-effect transistors with bottom-up synthesized armchair graphene nanoribbons.

Carbon nanotube field-effect transistors (CNFETs) promise to improve the energy efficiency, speed, and transistor density of very large scale integration circuits owing to the intrinsic thin channel body and excellent charge transport properties of carbon nanotubes. Low-temperature fabrication (e.g., <400 °C) is a key enabler for the monolithic three-dimensional (3D) integration of CNFET digital logic into a device technology platform that overcomes memory bandwidth bottlenecks for data-abundant applications such as big-data analytics and machine learning. However, high contact resistance for short CNFET contacts has been a major roadblock to establishing CNFETs as a viable technology because the contact resistance, in series with the channel resistance, reduces the on-state current of CNFETs. Additionally, the variation in contact resistance remains unstudied for short contacts and will further degrade the energy efficiency and speed of CNFET circuits. In this work, we investigate by experiments the contact resistance and statistical variation of room-temperature fabricated CNFET contacts down to 10 nm contact lengths. These CNFET contacts are ∼15 nm shorter than the state-of-the-art Si CMOS “7 nm node” contact length, allowing for multiple generations of future scaling of the transistor-contacted gate pitch. For the 10 nm contacts, we report contact resistance values down to 6.5 kΩ per source/drain contact for a single carbon nanotube (CNT) with a median contact resistance of 18.2 kΩ. The 10 nm contacts reduce the CNFET current by as little as 13% at V DS = 0.7 V compared with the best reported 200 nm contacts to date, corroborated by results in this work. Our analysis of R C from 232 single-CNT CNFETs between the long-contact (e.g., 200 nm) and short-contact (e.g., 10 nm) regimes quantifies the resistance variation and projects the impact on CNFET current variability versus the number of CNT in the transistor. The resistance distribution reveals contact-length-dependent R C variations become significant below 20 nm contact length. However, a larger source of CNFET resistance variation is apparent at all contact lengths used in this work. To further investigate the origins of this contact-length-independent resistance variation, we analyze the variation of R C in arrays of identical CNFETs along a single CNT of constant diameter and observe the random occurrence of high R C, even on correlated CNFETs.

The rational bottom-up synthesis of graphene nanoribbons (GNRs) provides atomically precise control of widths and edges that give rise to a wide range of electronic properties promising for electronic devices such as field-effect transistors (FETs). Since the bottom-up synthesis commonly takes place on catalytic metallic surfaces, the integration of GNRs into such devices 2 requires their transfer onto insulating substrates, which remains one of the bottlenecks in the development of GNR-based electronics. Herein, we report on a method for the transfer-free placement of GNRs on insulators. This involves growing GNRs on a gold film deposited onto an insulating layer followed by gentle wet etching of the gold, which leaves the nanoribbons to settle in place on the underlying insulating substrate. Scanning tunneling microscopy (STM) and Raman spectroscopy confirm that atomically precise GNRs of high density uniformly grow on the gold films deposited onto SiO 2 /Si substrates and remain structurally intact after the etching process. We have also demonstrated transfer-free fabrication of ultra-short channel GNR FETs using this process. Our work here represents an important step towards large-scale integration of GNRs into electronic devices.

The reticular synthesis of covalent organic frameworks (COFs), extended porous twodimensional (2D) or three-dimensional (3D) networks held together by strong, highly directional chemical bonds, has thus far been restricted to small, shape-persistent, molecular building blocks. Here, we demonstrate the growth of crystalline 2D COFs from a polydisperse macromolecule derived from single-layer graphene, bottom-up synthesized quasi one-dimensional (1D) graphene nanoribbons (GNRs). X-ray scattering and transmission electron microscopy reveal that 2D sheets of GNR-COFs self-assembled at a liquid-liquid interface stack parallel to the layer boundary and exhibit an orthotropic crystal packing. Liquid-phase exfoliation of multilayer GNR-COF crystals gives access to large area (>10 5 nm 2) bilayer and trilayer cGNR-COF films. The functional integration of extended 1D materials into crystalline COFs greatly expands the structural complexity and the scope of mechanical and physical materials properties accessible through a deterministic reticular bottom-up approach.

The thermal properties of single-walled carbon nanotubes (SWNTs) are of significant interest, yet their dependence on SWNT chirality has been, until now, not explored experimentally. Here we used electrical heating and infrared thermal imaging to simultaneously study thermal and electrical transport in chirality-sorted SWNT networks. We examined solution processed 90% semiconducting, 90% metallic, purified unsorted (66% semiconducting), and as-grown HiPco SWNT films.The thermal conductivities of these films range from 80 to 370 Wm -1 K -1 but are not controlled by chirality, instead being dependent on the morphology (i.e. mass and junction density, quasi-alignment) of the networks. The upper range of the thermal conductivities measured is comparable to that of the best metals (Cu and Ag) but with over an order of magnitude lower mass density. This study reveals important factors controlling the thermal properties of light-weight chirality-sorted SWNT films, for potential thermal and thermoelectric applications.

The electronic, optical, and magnetic properties of graphene nanoribbons (GNRs) can be engineered by controlling their edge structure and width with atomic precision through bottom‐up fabrication based on molecular precursors. This approach offers a unique platform for all‐carbon electronic devices but requires careful optimization of the growth conditions to match structural requirements for successful device integration, with GNR length being the most critical parameter. In this work, the growth, characterization, and device integration of 5‐atom wide armchair GNRs (5‐AGNRs) are studied, which are expected to have an optimal bandgap as active material in switching devices. 5‐AGNRs are obtained via on‐surface synthesis under ultrahigh vacuum conditions from Br‐ and I‐substituted precursors. It is shown that the use of I‐substituted precursors and the optimization of the initial precursor coverage quintupled the average 5‐AGNR length. This significant length increase allowed the integration of 5‐AGNRs into devices and the realization of the first field‐effect transistor based on narrow bandgap AGNRs that shows switching behavior at room temperature. The study highlights that the optimized growth protocols can successfully bridge between the sub‐nanometer scale, where atomic precision is needed to control the electronic properties, and the scale of tens of nanometers relevant for successful device integration of GNRs.

Terahertz (THz) technology has shown promise for several applications, but limitations in sources and detectors have prevented broader adoption. Existing THz detectors are rigid, planar, and fabricated using complex technology, making it difficult to integrate into systems. Here we demonstrate THz detectors fabricated by inkjet printing on submicrometer thick, ultraflexible substrates. By developing p-and n-type carbon nanotube inks, we achieve optically thick p−n junction and p-type devices, enabling antenna-free pixels for THz imaging. By further designing and folding the printed devices, we realize origami-inspired architectures with improved performance over single devices, achieving a noise-equivalent power of 12 nW/Hz 1/2 at room temperature with no voltage bias. Our approach opens avenues for nonplanar, foldable, deployable, insertable, and retractable THz detectors for applications in nondestructive inspection.