The typical layout in a piezoresistive tactile sensor arranges individual sensors to form an array with M rows and N columns. While this layout reduces the wiring involved, it does not allow the values of the sensor resistors to be measured individually due to the appearance of crosstalk caused by the nonidealities of the array reading circuits. In this paper, two reading methods that minimize errors resulting from this phenomenon are assessed by designing an electronic system for array reading, and the results are compared to those obtained using the traditional method, obviating the nonidealities of the reading circuit. The different models were compared by testing the system with an array of discrete resistors. The system was later connected to a tactile sensor with 8 × 7 taxels.
One of the most suitable ways of distributing a resistive sensor array for reading is an array with M rows and N columns. This allows reduced wiring and a certain degree of parallelism in the implementation, although it also introduces crosstalk effects. Several types of circuits can carry out the analogue-digital conversion of this type of sensors. This article focuses on the use of operational amplifiers with capacitive feedback and FPGAs for this task. Specifically, modifications of a previously reported circuit are proposed to reduce the errors due to the non-idealities of the amplifiers and the I/O drivers of the FPGA. Moreover, calibration algorithms are derived from the analysis of the proposed circuitry to reduce the crosstalk error and improve the accuracy. Finally, the performances of the proposals is evaluated experimentally on an array of resistors and for different ranges.
Resistive sensor arrays are formed by a large number of individual sensors which are distributed in different ways. This paper proposes a direct connection between an FPGA and a resistive array distributed in M rows and N columns, without the need of analog-to-digital converters to obtain resistance values in the sensor and where the conditioning circuit is reduced to the use of a capacitor in each of the columns of the matrix. The circuit allows parallel measurements of the N resistors which form each of the rows of the array, eliminating the resistive crosstalk which is typical of these circuits. This is achieved by an addressing technique which does not require external elements to the FPGA. Although the typical resistive crosstalk between resistors which are measured simultaneously is eliminated, other elements that have an impact on the measurement of discharge times appear in the proposed architecture and, therefore, affect the uncertainty in resistance value measurements; these elements need to be studied. Finally, the performance of different calibration techniques is assessed experimentally on a discrete resistor array, obtaining for a new model of calibration, a maximum relative error of 0.066% in a range of resistor values which correspond to a tactile sensor.
A simple method to measure the resistance of a sensor and convert it into digital information in a programmable digital device is by using a direct interface circuit. This type of circuit deduces the value of the resistor based on the discharge time through it for a capacitor of a known value. Moreover, the discharge times of this capacitor should be measured through one or two resistors with known values in order to ensure that the estimate is not dependent on certain parameters that change with time, temperature, or aging. This can slow down the conversion speed, especially for high resistance values. To overcome this problem, we propose a modified process in which part of the discharge, which was previously performed through the resistive sensor only, is only conducted with the smallest calibration resistor. Two variants of this operation method, which differ in the reduction of the total time necessary for evaluation and in the uncertainty of the measurements, are presented. Experiments carried out with a field programmable gate array (FPGA); using these methodologies achieved reductions in the resistance conversion time of up to 55%. These reductions may imply an increase in the uncertainty of the measurements; however, the tests carried out show that with a suitable choice of parameters, the increases in uncertainty, and therefore errors, may be negligible compared to the direct interface circuits described in the literature.
Tactile sensors suffer from many types of interference and errors like crosstalk, non-linearity, drift or hysteresis, therefore calibration should be carried out to compensate for these deviations. However, this procedure is difficult in sensors mounted on artificial hands for robots or prosthetics for instance, where the sensor usually bends to cover a curved surface. Moreover, the calibration procedure should be repeated often because the correction parameters are easily altered by time and surrounding conditions. Furthermore, this intensive and complex calibration could be less determinant, or at least simpler. This is because manipulation algorithms do not commonly use the whole data set from the tactile image, but only a few parameters such as the moments of the tactile image. These parameters could be changed less by common errors and interferences, or at least their variations could be in the order of those caused by accepted limitations, like reduced spatial resolution. This paper shows results from experiments to support this idea. The experiments are carried out with a high performance commercial sensor as well as with a low-cost error-prone sensor built with a common procedure in robotics.
Direct sensor–digital device interfaces measure time dependent variables of simple circuits to implement analog-to-digital conversion. Field Programmable Gate Arrays (FPGAs) are devices whose hardware can be reconfigured to work in parallel. They usually do not have analog-to-digital converters, but have many general purpose I/O pins. Therefore, direct sensor-FPGA connection is a good choice in complex systems with many sensors because several capture modules can be implemented to perform parallel analog data acquisition. The possibility to work in parallel and with high frequency clock signals improves the bandwidth compared to sequential devices such as conventional microcontrollers. The price to pay is usually the resolution of measurements. This paper proposes capture modules implemented in an FPGA which are able to perform smart acquisition that filter noise and achieve high precision. A calibration technique is also proposed to improve accuracy. Resolutions of 12 effective number of bits are obtained for the reading of resistors in the range of an example piezoresistive tactile sensor.
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