We propose an optical design process that significantly reduces the time and costs in direct backlight unit (BLU) development. In it, the basic system specifications are derived from the optical characteristics of RGB light-emitting diodes (LEDs) comprising the BLU. The driving currents are estimated to determine the theoretical RGB flux ratio for a desired white point. The number of LEDs needed to produce the target luminance is then calculated from the combined optical efficiencies of the components. Last, an appropriate array configuration is sought based on the illuminance distribution function for meeting the target uniformity. To showcase the design process we built two 42-inch triangular cluster arrays of 40 x 16 LED elements. When a flat reflective sheet was used, the minimum thickness required of the system to satisfy the target uniformity was 30 mm. Introducing a patterned reflective sheet removed hotspots that resulted from reducing the system thickness without the aid of additional optical components. Using an optimized patterned reflective sheet, reduction in system thickness as much as 5 mm was possible.
With the increasing demand for large scale micro/nano components in the fields of display, energy and electrical devices, etc, the establishment of a roll imprinting process has become a priority. The fabrication of a roll stamp with high dimensional accuracy and uniformity is one of the key issues in the roll imprinting process, because the roll stamp determines the properties of the replicated micro/nano structures. In this study, a method to fabricate a metallic roll stamp with low internal stress, high flatness, and high hardness was proposed by a pulse reverse current (PRC) electroforming process. The effects of PRC electroforming processes on the internal stress, hardness, and grain size of the electroformed stamp were examined, and the optimum process conditions were suggested. As a practical example of the proposed method, various micro-patterns for electronic circuits were fabricated via the roll imprinting process using a PRC electroformed stamp.
Laser interference lithography (LIL) is a technique that allows maskless patterning of large areal periodic nano/micro structures. The LIL pattern is often used as an etch barrier to pattern SiO2 intermediate layer in the fabrication process of high aspect ratio silicon nano/micro structures by deep reactive ion etching process (DRIE) with SiO2 etch barrier. In this study, a method to fabricate high aspect ratio nanograting structures by direct DRIE process of silicon substrate using LIL pattern without intermediate layer was developed as a simple and cost-effective fabrication process. To fabricate high aspect ratio silicon nanograting with high pattern fidelity, a simulation method to predict the cross sectional profile of photoresist (PR) pattern after exposure and development processes was investigated, and the LIL processing conditions were selected to obtain optimized cross sectional profile of PR pattern without residual layer based on the simulation results. To minimize the side wall defects during the DRIE process due to the deterioration of LIL pattern etch barrier, the processing conditions of DRIE process including etching gas, etching gas ratio, passivation time and power were optimized. Finally, a silicon nanograting with a grating pitch of 780 nm and height of 2.42 µm (aspect ratio: 6) was fabricated via the developed direct DRIE process with LIL pattern.
The technology of depositing a uniform and stable anti-adhesion layer on a wafer-scale nanostamp is a critical issue in the industrialized nanoimprinting process. The deposition of an anti-adhesion layer involves O2 plasma treatment to modify the stamp surface and the reaction of the monomers with the surface. Although an automated one-chamber system was developed for uniform and stable anti-adhesion layer coating, unwanted molecules are irregularly deposited on a sample during the O2 plasma treatment due to the contamination of the chamber, leading to the degradation of the anti-adhesion properties. In this paper, a two-chamber self-assembled monolayer (SAM) deposition system was proposed to prevent the degradation of the anti-adhesion properties due to contamination. To examine the effectiveness of the proposed system, the contact angles and chemical compositions of the SAM-coated silicon mold prepared using the one- and two-chamber systems were measured and compared. Finally, 4-in nanoimprinting of 35-nm-half-pitch full-track nanopatterns was conducted using a SAM-coated silicon nanomold prepared using the one- and two-chamber systems, and the replication quality was examined.
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