PACS 75.30.Gw, 75.70.Cn Antiferromagnetic (AF) layer thickness and the annealing temperature dependences of perpendicular magnetic anisotropy (PMA) in the [CoFe/Pt] n multilayers exchange-coupled by NiO pinning layers at the top and bottom interfaces were investigated. Also we confirmed that the interlayer exchange coupling (IEC) at room temperature (RT) as a function of NiO thickness with a period of two monolayers existed.1 Introduction To achieve the truly next generation device for applying a magnetic random access memory (MRAM) using the magnetic tunnel junction (MTJ), all using ferromagnetic materials should be patterned into sub-micron elements. There are existed two hurdles in the conventional MTJ device, such as; a magnetization curling occurs at the edge of the film and in the vortex magnetization, and an anomalous switching depends on the shape of the in-plane MTJ. There are also caused by switching field fluctuations, which occur at the film edge when using an in-plane MTJ. On the other hand, perpendicular magnetic anisotropy (PMA) films have a low saturation magnetization, preventing any magnetization curling at the film edge [1]. Therefore, a MTJ with an aspect ratio of L(length)/W(width)=1 can be realized using perpendicular magnetization [2,3].We studied antiferromagnetic (AF) layer thickness and the annealing temperature dependences of perpendicular magnetic anisotropy in the [CoFe/Pt] N multilayers exchange-coupled by NiO pinning layers at the top and bottom interfaces. Also, the characteristics of the interlayer exchange coupling (IEC) across of insulating AF spacer (NiO) in heterostructures of type [Pt/CoFe] n AF/[CoFe/Pt] n was investigated.
A magnetic tunnel transistor (MTT) device using an amorphous n-type Si semiconductor film for the base and collector consisting of [CoFe/NiFe] (free layer) and Si (top layer) multilayers is used to study the spin-dependent hot electron magnetocurrent (MC) and the tunneling magnetoresistance at room temperature. A large MC of more than 40.2 % is observed at the emitter -base bias voltage V BE of 0.62 V. The increasing emitter hot current and transfer ratio with the increase of the emitter -base voltage are due mainly to a rapid creation of a number of conduction-band states in the Si collector. However, above a V BE of 0.62 V, a rapid decrease of the MC is observed in an amorphous Si-based MTT.
IntroductionThe most concerned interest in the spin electronics research field is the performance of magnetic random access memories (MRAMs) and logic magnetic tunnel transistors (MTTs) considered under the same conditions of charge and spin degree of freedom [1 -3]. The magnetic tunnel junction (MTJ)-type MTT device developed by the S. S. P. Parkin research group has the emitter as a pinned layer of the MTJ, the base as a free CoFe layer, and the collector as an n-type GaAs substrate using the energy difference of the injected hot electrons according to the emitter-base voltage (V EB ). On the other hand, the structure of a spin-valve-type MTT device has the emitter as a Cu or Au layer and the base as a spin valve. For the two types of MTTs, the attenuation length (λ maj ) of hot electrons arriving at the base is 60 -90 Å, corresponding to V EB = 1.0 -1.8 V. It was reported [1 -3] that the transfer ratio (collector current: I C /emitter current: I E ) going through the base is maintained at about 10 -4 [4,5]. Also, up to a thick base layer of 120 Å, a magnetocurrent (MC) depending on an external magnetic field has maximum and minimum values, corresponding to magnetization arrayed parallel and antiparallel, changing from 65% to 1250% at 71 K [6,7]. From these results, the development of MTT devices is an ongoing issue. However, MTTs with a Si or GaAs substrate contain several hurdles such as the leakage current through a wide collector electrode, the formation of a silicide layer, and the impurity at the interface. This paper introduces the fabrication of a new MTT structure and reports the characteristics of it using a collector of an n-type Si amorphous thin film as the top layer.
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