Much effort has been dedicated to text-based traffic sign detection and recognition. However, there are still two problems. First, unlike English traffic signs with only horizontal text, Chinese traffic signs have both horizontal and vertical text. To the best of our knowledge, there is nothing in the literature about simultaneous recognition of both horizontal and vertical text in Chinese text-based traffic signs. Second, most existing methods focus on wild and expressway scenes; few focus on street scenes. To solve these problems, we propose a mixed vertical-and-horizontal-text traffic sign detection and recognition algorithm for streetlevel scene. First, an effective combination of different red, green and blue components is used to distinguish the traffic signs from many objects of similar color in the very complex street scenes. Second, unlike English letters, the strokes of many Chinese characters are unconnected, which may result in that a character will be detected as two or more characters. Unlike the English text lines, which are only horizontal, the Chinese text lines on text-based traffic signs are usually both in horizontal and vertical directions. Our proposed method uses the position and structural information of the characters to form the text lines. A dataset of Chinese text-based traffic signs is collected. Experimental results indicate the effectiveness of the proposed method.
Variable block size motion estimation has contributed greatly to achieving an optimal interframe encoding, but involves high computational complexity and huge memory access, which is the most critical bottleneck in ultra-high-definition video encoding. This article presents a hardware-efficient block matching algorithm with an efficient hardware design that is able to reduce the computational complexity of motion estimation while providing a sustained and steady coding performance for high-quality video encoding. A three-level memory organization is proposed to reduce memory bandwidth requirement while supporting a predictive common search window. By applying multiple search strategies and early termination, the proposed design provides 1.8 to 3.7 times higher hardware efficiency than other works. Furthermore, on-chip memory has been reduced by 96.5% and off-chip bandwidth requirement has been reduced by 39.4% thanks to the proposed three-level memory organization. The corresponding power consumption is only 198mW at the highest working frequency of 500MHz. The proposed design is attractive for high-quality video encoding in real-time applications with low power consumption.
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