In this paper an interdigital n-type CoSi 2 -Si Schottky diode is fabricated in SMIC 0.18ȝm RF CMOS process. A novel and accurate Schottky diode model has been developed base on the DC and RF measured data. In this novel model the losses due to parasitic capacitance dielectric and metal plate are considered. It is shown that the suggested novel model fits the measurement very well for different voltage biases over the wide frequency range of 0.05GHz to 8.5GHz. A type of four stages charge pump is designed using this new Schottky diode model, the design charge pump can get efficiency of 40%. Key words: RF CMOS; Schottky diode; Modeling; RFID
IntroductionWith fast growth of radio frequency (RF) wireless communication technology, the demand for high performance but low cost RF solution is rising. Schottky diodes due to their high operating frequency, fast switching speed and low forward voltage drop have been widely used in RF power detection circuits, mixers and low-voltage reference circuits [1][2][3].When the circuit is operating in the radio frequency range, the simple diode SPICE model is insufficient to describe the integrated Schottky diode characteristics due to the bulk effects introduced by the lossy Si substrate. In order to design SBD (Schottky Barrier Diode) rectifier or detector in a CMOS RF Transceiver chip, accurate and reliable simulation of DC and RF characteristics of the Schottky diode is required. In section 2 of this paper, we design and fabricate an interdigital n-type CoSi 2 -Si Schottky diode and in section 3 and 4 we develop and discuss a new Schottky diode model, when compared with conventional model, the losses due to parasitic capacitance dielectric and metal plate is considered in this novel model. The accuracy of the model has been verified for various voltage biases from 0.05GHz to 8.5GHz.
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