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The digital pixel driving scheme makes the organic light-emitting diode (OLED) microdisplays more immune to the pixel luminance variations and simplifies the circuit architecture and design flow compared to the analog pixel driving scheme. Additionally, it is easily applied in full digital systems. However, the data bottleneck becomes a notable problem as the number of pixels and gray levels grow dramatically. This paper will discuss the digital driving ability to achieve kilogray-levels for megapixel displays. The optimal scan strategy is proposed for creating ultra high gray levels and increasing light efficiency and contrast ratio. Two correction schemes are discussed to improve the gray level linearity. A 1280×1024×3 OLED-on-silicon microdisplay, with 4096 gray levels, is designed based on the optimal scan strategy. The circuit driver is integrated in the silicon backplane chip in the 0.35 μm 3.3 V-6 V dual voltage one polysilicon layer, four metal layers (1P4M) complementary metal-oxide semiconductor (CMOS) process with custom top metal. The design aspects of the optimal scan controller are also discussed. The test results show the gray level linearity of the correction schemes for the optimal scan strategy is acceptable by the human eye.

This paper presents a modularized buck-boost and series LC converter (BBSLCC) circuit for series battery equalizers. The proposed topology has numerous advantages. First, the number of switches in the equalizer is equal to the number of the battery cells needs to be balanced in the string. This is so called one-switch-per-cell, which is a great advantage over the traditional buck-boost converter, since it requires almost twoswitch-per-cell to balance. Second, unlike many other existing one-switchper-cell equalizers, the proposed circuit has the advantage in the modularization design and low voltage stress requirement on the switches. Third, the peak current of the balancing capacitor are suppressed by the synchronous phase-shift controller (SPSC) which can be easily implemented by sensing the zero crossing of the LC resonant current. By using the proposed controller, the speed of the battery equalizing process is also accelerated. In this paper, the proposed topology is first presented, and the operating principle is illustrated. Afterwards, the phase-shift time and the transferred energy of the BBSLCC circuit are calculated to demonstrate the proposed control strategy details. The relationships between the phase-shift time and other circuit parameters such as the inductance and the capacitance are also analyzed. The simulation results and the experimental results are finally demonstrated and verified the theoretical analysis on the performance of the proposed BBSLCC circuit.

The paper puts forward a method on controlling the AM-OLED panel to display image with high gray scale levels. It also gives an ASIC design sample to implement this method. A twenty sub-fields scan scheme has been taken into use in the chip to display 256 gray scale levels on a QVGA resolution AM-OLED display screen. The functions of image scaling and rotating have also been implemented for multiply application. The simulation and chip test result show that the chip design has met the design requirements.

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