The RC delay and power restrictions imposed by the interconnect system can contribute to poor circuit performance in an increasingly severe manner as dimensions shrink. Resistances are increasing faster than the scale factor of the technology and capacitance improvements are constrained by mechanical requirements of the assembled stack. Collectively, these cause a bottleneck in both local and global information transfer on a chip. Novel deposition methods and novel conductor materials are being explored as means to increase conductive cross sectional area. Molecular ordering is an opportunity to simultaneously deliver capacitance and mechanical strength. Despite these improvement paths, a more holistic approach to interconnect design is needed, where the application and micro architecture are more tolerant of RC scaling constraints.
This paper summarizes an alternate test methodology that enables significant reduction in testing time and tester complexity for RF circuits without the need for low-level simulation models. Traditionally, alternate test makes use of circuit and process-level models to analyze the sensitivity of datasheet specifications to the variations in process parameters. In this paper, we demonstrate a "gray-box" approach by creating a high-level simulation model from datasheet information and simple hardware measurements. This model is used together with a customized behavioral simulator to enable efficient search of an alternate test stimulus that is optimal in terms of tester constraints, test time and specification prediction accuracy. The specific example is a third party RF front-end chip, for which 13 specifications including S-parameters, intermodulation products and noise figures are measured with both conventional and alternate methods. The results are compared in terms of testing time, tester cost and accuracy.
Vector network analyzer (VNA) measurements are often stated without an indication of the estimated uncertainty. Understanding the uncertainty can lead to understanding the sources of uncertainty and targeting improvements in the metrology to address the largest sources.Connector repeatability in manually probed measurements can be a primary source of uncertainty with this metrology. A measurement capability assessment provides the method for evaluating the total uncertainty. Evaluation of the probe launch and cable movement provided substantial opportunities to improve the capability. Implementing improvements identified through the measurement capability assessment (MCA) process has resulted in a doubling of the highest frequency where the metrology is deemed capable.
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