DC and pulse voltage-induced metal-insulator transition (MIT) in epitaxial VO2 two terminal devices were measured at various stage temperatures. The power needed to switch the device to the ON-state decrease linearly with increasing stage temperature, which can be explained by the Joule heating effect. During transient voltage induced MIT measurement, the incubation time varied across 6 orders of magnitude. Both DC I-V characteristic and incubation times calculated from the electrothermal simulations show good agreement with measured values, indicating Joule heating effect is the cause of MIT with no evidence of electronic effects. The width of the metallic filament in the ON-state of the device was extracted and simulated within the thermal model.

We show that the use of sub-nm adhesion layers significantly enhances the thermal interface conductance at metal-dielectric interfaces. A metal-dielectric interface between Au and sapphire (Al 2 O 3 ) was considered using Cu (low optical loss) and Cr (high optical loss) as adhesion layers. To enable high throughput measurements each adhesion layer was deposited as a wedge such that a continuous range of thickness could be sampled. Our measurements of thermal interface conductance at the metal-Al 2 O 3 interface made using frequency domain thermoreflectance show that a 1 nm thick adhesion layer of Cu or Cr is sufficient to enhance the thermal interface conductance by more than a factor of 2 or 4, respectively, relative to the pure Au-Al 2 O 3 interface. The enhancement agrees with the Diffuse Mismatch Model-based predictions of accumulated thermal conductance versus adhesion layer thickness assuming that it contributes phonons with wavelengths less than its adhesion layer thickness, while those with longer wavelengths transmit directly from the Au.

This article describes an approach for implementing a complete computer system ͑CPU, RAM, I/O, and nonvolatile mass memory͒ on a single integrated-circuit substrate ͑a chip͒-hence, the name ''single-chip computer.'' The approach presented combines advances in the field of microelectromechanical systems ͑MEMS͒ and micromagnetics with traditional low-cost very-large-scale integrated circuit style parallel lithographic manufacturing. The primary barrier to the creation of a computer on a chip is the incorporation of a high-capacity ͓many gigabytes ͑GB͔͒ re-writable nonvolatile memory ͑in today's terminology, a disk drive͒ into an integrated circuit ͑IC͒ manufacturing process. This article presents the following design example: a MEMS-based magnetic memory that can store over 2 GB of data in 2 cm 2 of die area and whose fabrication is compatible with a standard IC manufacturing process.

Threshold switching devices are of increasing importance for a number of applications including solid-state memories and neuromorphic circuits. Their non-linear characteristics are thought to be associated with a spontaneous (occurring without an apparent external stimulus) current flow constriction but the extent and the underlying mechanism are a subject of debate. Here we use Scanning Joule Expansion Microscopy to demonstrate that, in functional layers with thermally activated electrical conductivity, the current spontaneously and gradually constricts when a device is biased into the negative differential resistance region. We also show that the S-type negative differential resistance I – V characteristics are only a subset of possible solutions and it is possible to have multiple current density distributions corresponding to the same value of the device voltage. In materials with steep dependence of current on temperature the current constriction can occur in nanoscale devices, making this effect relevant for computing applications.

Transmission electron microscopy with in situ biasing has been performed on TiN/single‐crystal rutile TiO2/Pt resistive switching structures. Three elementary processes essential for switching: i) creation of oxygen vacancies by electrochemical reactions at low temperatures (<150 °C), ii) their drift in the electric field, and iii) their coalescence into planar faults (and dissociation from them) have been documented. The faults have a form of vacancy discs in {110} and {121} planes, are bound by partial dislocation loops, and are identical to Wadsley defects observed in nonstoichiometric TiO2 annealed at high temperatures. The faults can be regarded as a precursor to the formation of oxygen‐deficient Magnéli phases, but 3D secondary phase inclusions have not been detected. Together, the observations shed light on the behavior of oxygen vacancies in relatively low electric fields and temperatures, suggesting that, in addition to the rather accepted notion of oxygen vacancy motion during the writing processes in resistive switching devices, such motion may occur even during reading, and may be accompanied by significant oxygen vacancy creation at modest device excitation levels.