With the continued scaling of CMOS devices below the 10 nm node, process technologies become more and more challenging as the allowable thermal budget for device processing continuously reduces. This is especially the case during epitaxial growth, where a reduction of the thermal budget is required for a number of potential reasons for example to avoid uncontrolled layer relaxation of strained layers, surface reflow of narrow fin structures, as well as doping diffusion and material intermixing. Further aspects become even more challenging when Ge is used as a high-mobility channel material and when the device concept moves from a FinFET design to a nanowire FET design (also called Gate-All-Around FET). In this contribution we address some of the challenges involved with the integration of high mobility Group IV materials in these advanced device structures.

Distributed Acoustic Sensing (DAS) deployed in a wellbore can be used to detect P-waves and S-waves generated in the subsurface. In a well which has geophones and a DAS cable deployed, micro-seismic events have been detected on both instruments at the same time, establishing the concept of using DAS as a micro-seismic detector. While DAS is still less sensitive than geophones, it has the advantage of being non intrusive and a permanent installation, so both recording in treatment wells and 4D recording concepts are realistic options that can be implemented once the fibered cable is installed.

With proceeding CMOS device scaling, process technologies become more and more challenging as the allowable thermal budget for device processing continuously reduces. This is especially the case during epitaxial growth, where a reduction of the thermal budget is required for a number of potential reasons (e.g. to avoid uncontrolled layer relaxation of strained layers, surface reflow of narrow fin structures, as well as doping diffusion and material intermixing). Different aspects become even more challenging when Ge is used as a high-mobility channel material and when the device concept moves from a FinFET design to a nanowire FET design (also called Gate-All-Around FET). In this contribution we address some of the challenges involved with the integration of high mobility Group IV materials in these advanced device structures.

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