In recent years, many solution-processed oxide transistors have been reported with mobility rivaling or exceeding their vacuum-deposited counterparts. Here, we show that water absorption from the environment by solution-processed dielectric materialsexplains this enhanced mobility. By monitoring the water content of Al 2 O 3 , ZrO 2 , and bilayer dielectric materials, we demonstrate how water absorption by the dielectric affects electrical characteristics in solution-processed metal oxide transistors. These effects, including capacitance−frequency dispersion, counterclockwise hysteresis in transfer curves, and high channel mobility, are elucidated by electron transfer between the gate/channel and trap states within the band gap of the dielectric created by the water.
This paper presents a 622Mbps to SGbps transceiver in standard 0.13pm CMOS technology. Each receiver and transmitter macrocell has its dedicated clock multiplication unit (CMU) and clocWdata recovery unit (CDR), providing simultaneous multi-rate operation for multiple lanes on a chip. The transmitter and receiver front-end use direct 4:1 multiplex and 1:4 demultiplexing, using multiple-phase quarter-rate clocks. An automatic phase offset cancellation scheme is used to eliminate the phase mismatch of the multiple clock phases. Each transceiver occupies an active area of less than 0.4mm2 and consnmesl50mW at maximum speed.
In this abstract we present a highly manufacturable, high performance 90nm technology with best in class ,performance for 35nm gate-length N and P transistors. Unique, but simple and low cost, process changes have been utilized to modulate channel stress and implant profile to generate enhanced performance with no additional masks. High drive currents of 1193uAium and 587uAium are obtained for nMOS and PMOS transistors respectively at I .2V Vdd and an Ioff of 60nMpm. An industry leading 90nm technology CVil of 0 . 6 1~s and 1 .
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