We report on the fabrication and structural characterization of arrays of superconducting nanowires by electroplating lead into the nanopores of track-etched polymer membranes. The diameters of the lead nanowires range from 400 down to 70 nm, whereas their length is about 20 mm. Large enhancement of the critical field has been observed in good agreement with the Ginsburg-Landau-Silin theory. By comparing the predicted critical field enhancement for thin cylinders with experimental results, we have extracted the effective penetration depth. The dependence of the effective penetration depth and electron mean free path on the wire diameter is also discussed.
The processes used for the surface planarization of the interlevel dielectrics which is one of the major problems of the multilevel interconnection CMOS technology, are becoming increasingly sophisticated. As a consequence, the reproducibility of the total process requires an accurate control of these technics in order to increase die yields. The DOPED method, developed for a non-contact on-line monitoring of flow annealing of BPSG films has been applied to the “cold” planarization techniques implemented in the CNET 0.7 µm technology. Results are obtained for TEOS deposition and etchback techniques and SOG total etchback.
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