A four-quadrant analog multiplier with ultra-low supply voltage operation, rail-to-rail input swing and insensitive to different dc levels between the multiplied input signals is presented. It is based on the Floating-Bulk technique, in which the input signal is coupled to the bulk terminal of a PMOS transistor by means of an input capacitor. This allows rail-to-rail operation and eliminates the dc level of the input signals regardless of the offset between them, maintaining linearity. Moreover, it also eliminates the threshold-voltage requirement in the signal path of the input transistors, allowing very low voltage operation defined by a gate-source and a drain-source voltages. Experimental results in 0.5µm technology demonstrate rail-to-rail operation with a 1.1 V supply voltage even with different dc level voltages between the multiplied input signals. It offers a distortion of THD = 0.95 % for an input signal of 0.2Vpp at 100kHz.
The use of a multiple-input floating-gate transistor as the main element for effecting the correlation of two binary sequences is proposed and validated. A complete architecture is proposed to implement a correlating system. The algorithm is discussed and the implementation of a circuit for 256-bit sequences in 0.35 µm CMOS technology is presented as a testing vehicle. Its use is furthermore proposed as a pilot baseband signal detector for a wireless communication system. The manufactured circuit offers favorable performance with a clock signal of up to 25 MHz with a 2.3 V supply voltage and 20 mW of power consumption.
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