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A chip set for compact transceivers meeting IS54 dual-mode cellular telephone standards consists ofa direct up-conversion modulator and a double conversion receiver in a 12GHz superself-aligned bipolar process. Operated from a 5V power supply, the total power dissipation is 310mW. Both circuits can be put into a power-down mode with a maximum off-current of 1OpA. The modulator chip is 4.1mm2, and the receiver, 4. 9"' . The modulator block diagram is shown in Figure 1. The advantage of direct up-conversion over indirect up-conversion is that there is only one local oscillator (LO) and no intermediate frequency (IF) filtering is required, but care must be taken to avoid producing in-band spurious signals. In this implementation the inputs are a single-ended local oscillator (LO) and balanced I (in-phase) and Q (quadrature) baseband signals. Nominal maximum output power is 0dBm.The local LO power requirement is -1OdBm typical. The baseband inputs are high impedance and require 2.5Vpp differential for maximum RF output.The LO input is buffered and sent to an R-C phase splitter to produce two signals approximately 90" out of phase. The two signals are passed through the Havens amplitude and phase corrector circuit to insure that the inputs to the mixer are equal in amplitude and 90" out of phase, with small deviation [ 11. The LO signals are then mixed with the I and Q baseband signals to produce the single-sideband suppressed-carrier RF output signal. The output stage consists of a low-distortion voltage amplifier followed by a power gain stage with 50R output impedance. The corrector circuit is shown in Figure 1. Operation is based on the fact that if two equal-amplitude signals are not exactly SO" out of phase, their sum and difference will be. The pair of gain stages following the phase splitter, overdriven emitter-coupled pairs, insure that the signals into the first pair of summers are of equal amplitude. Since the correction of phase introduces amplitude imbalance, the second pair of gain stages recorrects the amplitude. The summers are linearized emitter-coupled pairs with shared collector loads. The measured phase error is 0.120.084" and the mixer amplitude imbalance is 0.10+0.05dB.Part of the modulator design is concerned with avoiding the creation of spurious signals. Figure 2 shows the output spectrum generated with a single-tone baseband input (at 80kHz) as a function of baseband drive level. The desired signal is at the local oscillator frequency plus 80kHz (USB). The largest undesired signals are at the LO frequency, 2 basebands above LO (LO+BBB), and at 1 and 3 basebands below LO (LSB, LO-3BB). The behavior of LO feedthrough shows relatively flat response reflective of passive coupling. The component at LO-1BB is due to mixer imbalance and the LO phase error. The component at LO+2BB is due to feedback of the modulator output to the LO input and increases at a rate of 2dB per dB increase of output level. The output-signal component at the LO input is remixed with the baseband signal. This component decr...

communicate equally well with any other device. In addition to the user-data channels, the IC features a bidirectional channel for enabling remote loopback testing and a link-status indicator to show when two devices are properly connected by an optical fiber.A CMOS peer-relationship optical transceiver has been fabricated, permitting bi-directional digital data transmission with one optical fiber. The IC, when used with a single LED, provides two full-duplex user data channels at 19.2 kbit/s and 1200 bit/s via a time-division multiplexing of the optical signals. TRANSMIT PATHThe 19.2 kbit/s TX-Data lead is continuously sampled once every 2.5 1 / . I S. The Transmitter stores the successive samples in its 31-bit register. Since the shortest bit time of a 19.2 kbit/s signal is about 5 2 p , TX-Data is being oversampled. The oversampling is necessary to insure no more than ~L S of uncertainty in the location of any transition has been introduced by the link. Because the data is over sampled, the parallel output of the 31-bit register is continuously encoded into 9 bits. OVERVIEWThe 1C described in this paper provides two full-duplex data channels over a single optical fiber. The first channel, consisting of a transmit and receive pair, operates at any data rate up to 19.2 kbit/s over the TX-Data and RX-Data leads ( fig. 1). The other channel operates up to 1200 bit/s over the TX-Control and RX-Control leads. To accomplish the bi-directional transmission with a single fiber, the user data is continuously sampled and time-compressed into packets. The packets are then altemately transmitted to and received from the optical fiber. Since a single LED is used as both a light emitter and detector, the cost for a fullduplex optical lmk has been reduced over what has previously been possible.The IC may be broken into two sections, analog and digital. The analog section interfaces between the SV digital signals and the transmit and receive currents of the LED. The digital section handles the timing, fonnatting and multiplexing operations necessary for two devices to regularly exchange packets of data. The digital section consists of four major blocks: Protocol, Timer, Receiver, and Transmitter.