1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers 1993
DOI: 10.1109/isscc.1993.280023
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A 900 MHz transceiver chip set for dual-mode cellular radio mobile terminals

Abstract: A chip set for compact transceivers meeting IS54 dual-mode cellular telephone standards consists ofa direct up-conversion modulator and a double conversion receiver in a 12GHz superself-aligned bipolar process. Operated from a 5V power supply, the total power dissipation is 310mW. Both circuits can be put into a power-down mode with a maximum off-current of 1OpA. The modulator chip is 4.1mm2, and the receiver, 4. 9"' . The modulator block diagram is shown in Figure 1. The advantage of direct up-conversion over… Show more

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Cited by 33 publications
(7 citation statements)
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“…Quadrature generators reported in the literature so far fall within one of the following categories: RC-CR filters [21], polyphase filters [22], subtraction and addition [23], frequency division [24], cellular oscillator networks [25], ring oscillators [3] and quadrature LC-oscillators [26]. Most of these approaches either have a large form factor due to the use of resistors and capacitors consuming a relatively high chip area, or result in an increase in power consumption due to the requirement for RF buffers between the quadrature generator and the mixers, or due to the use of a VCO operating at twice the frequency of interest.…”
Section: Quadrature Generatormentioning
confidence: 99%
“…Quadrature generators reported in the literature so far fall within one of the following categories: RC-CR filters [21], polyphase filters [22], subtraction and addition [23], frequency division [24], cellular oscillator networks [25], ring oscillators [3] and quadrature LC-oscillators [26]. Most of these approaches either have a large form factor due to the use of resistors and capacitors consuming a relatively high chip area, or result in an increase in power consumption due to the requirement for RF buffers between the quadrature generator and the mixers, or due to the use of a VCO operating at twice the frequency of interest.…”
Section: Quadrature Generatormentioning
confidence: 99%
“…Specifically, connects to the lower branch, and it is then mixed with the LINC output. After the LPF, we obtain (20) Again, it is a time-varying sinusoidal signal, but this time its amplitude and dc offset change slightly. The DSP searches the maximum and minimum signal values, and by combining these two extreme values, and can be computed as follows:…”
Section: A Algorithm Theorymentioning
confidence: 99%
“…In fact, the performance of the foreground and background algorithms is limited by the quadrature errors. Fortunately, highly accurate quadrature modulators are routinely available for up-and down-conversion applications [20].…”
Section: A Foreground Algorithmmentioning
confidence: 99%
“…A cascade of multistage common-emitter topology may be used; however, the required dc bias current on the successive stage will have to be quite high to handle amplified version of the input signal. A more powerefficient amplifier topology, shown in Figure 2(a), provides high gain and low noise, as the same bias current flows through both transistors Q1 and Q2 [9]. An additional advantage of the cascode is its ability to handle larger supply voltages.…”
mentioning
confidence: 99%