No abstract

No abstract

ESSs) requires a comprehensive set of technologies and design tools. The technology used for the 1A Processor and several ESSs consists of sili con integrated circuits, thin-film hybrid circuits, discrete component packaging, and apparatus to interconnect, power, and communicate with these devices. The application tools consist of comprehensive design guidelines and computer aids for circuit, logic, thermal, and physical design. In addition, computer aids are provided for docu mentation and preparation of information for manufacturing and testing. This paper uses text and illustrations to describe the design details and achieved performance of each of the major elements of the technology.

The mechanical packaging design of any large electronic system can have a profound effect on the cost of the system and on its operating reliability. This article describes the No. 1 ESS packaging design and discusses the considerations which influenced it. Printed wiring packaging techniques are used for the individual circuit packs. A new connector and multiple board mounting, which allow considerable flexibility and a high degree of package density, were designed specifically for this application. A test program has established that the connector will perform reliably for a 40‐year design life.

No abstract

The term “field utilities” describes a number of tools used by telephone company craft and support staff as well as Western Electric and Bell Laboratories field support personnel for trouble‐clearing and routine maintenance activities on the 3B20D/DMERT system. This complementary set of tools provides debugging coverage for the system regardless of load or system functionality. In addition, it deals with the challenges and complexities posed by the concepts of parallel processing, virtual addressing, and swapping. This article describes the various field utilities and discusses their capabilities.