The design of a mixed-signal random number generator (RNG) integrated circuit (IC) suitable for integration with hardware cryptographic systems is presented. Certain applications in cryptography require the use of a truly RNG, a device which produces unpredictable and unbiased digital signals derived from a fundamental noise mechanism. For IC-based cryptographic systems, an RNG must harness randomness from a low-power noise signal yet remain insensitive to deterministic influences such as crosstalk, power supply noise, and clock signal coupling through the substrate. An RNG IC utilizing established analog IC design techniques was designed and fabricated in a 2-m CMOS technology. Sequences generated by the experimental system repeatedly passed many standard randomness tests for bit rates up to 1.4 MHz. No changes in randomness performance were observed as the system was exposed to power supply noise and substrate signal coupling. The system occupies a total chip area of 1.5 mm 2 and dissipates 3.9 mW of power.Index Terms-Cryptography, noise generator, random bit generator, random number generator, truly random.

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I I I I I I I I 1 A current mode CMOS voltage reference uses it pchannel MOSFET threshold voltage cxtractor circuit to create a currcn t that is inversely proportional to temperature. This current is summed with a current that i s proporlional to tempcrature into a rcsistor to crealc a voltage that is, to the first order, tcmpcrature indcpendent. The output voltage is scalable by adjusting the sizc of the summing resistor. The circuit opcrates over tcmperducc from 0 to 100°C with D. 'powcr supply voltage lxtwcen 3.3 and 7V. Bxperiinenlat results show that over these conditions, the output voltagc varies by f3%.

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An integrated photodetector array has been fabricated using lateral bipolar phototransistors. These transistors are ten times as responsive (h=660nm) as identically sized vertical bipolar phototransistors and arrays of this transistor consume less power than charge-coupled device arrays of the same size. The image processing for this array is accomplished through the use of a current mode comparator.