Electrochemical impedance spectroscopy is attracting more attention due to an increasing production of power sources. One highly popular tool for diagnosing diverse power sources is distribution function of relaxation times (DRT), which has led to numerous approaches for extracting DRT from impedance data. The majority of these are based on the numerical approximation of integral. However, herein we have applied an analytical approximation of the EIS integral. For the first time, we have employed Levenberg-Marquardt algorithm (LMA) to extract the applicable DRT from impedance data by using the Jacobian matrix that was obtained without any discretization errors. Although LMA was previously used to fit EIS data by DRT characteristics, the DRT profile was not applicable due to discretization errors. In this work, LMA was applied as it has an automatic update of the regularization λ parameter. Tests conducted in this work have shown that LMA is capable of extracting DRT from ZARC and FRAC synthetic data.

We used genetic programming to evolve a direct search optimization algorithm, similar to that of the standard downhill simplex optimization method proposed by Nelder and Mead ( 1965 ). In the training process, we used several ten-dimensional quadratic functions with randomly displaced parameters and different randomly generated starting simplices. The genetically obtained optimization algorithm showed overall better performance than the original Nelder-Mead method on a standard set of test functions. We observed that many parts of the genetically produced algorithm were seldom or never executed, which allowed us to greatly simplify the algorithm by removing the redundant parts. The resulting algorithm turns out to be considerably simpler than the original Nelder-Mead method while still performing better than the original method.

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Abstract:The ever-shorter time-to-market calls for efficient robust IC design algorithms. Robust circuits satisfy all design requirements across a range of operating conditions and manufacturing process variations. In the paper we propose an automated robust IC design and optimization process derived from the design algorithms utilized manually by experienced analog IC designers. We achieve this by transforming the robust design and optimization problem into a constrained optimization problem using tradeoff planes and penalty functions. We illustrate the method on a robust differential amplifier design problem. Circuits resulting from several different optimization runs show that a computer can not only improve existing circuit designs but it can also size a circuit with very little initial knowledge. The resulting circuits have comparable or even superior performance to humanly designed circuits. The method could easily take advantage of parallel processing but is still efficient enough to be run on a single computer.