This paper presents the efficient algorithm mapping for the real-time MPEG-2 encoding on the KAIST Image Computing System (KICS), which has a parallel architecture using five multimedia video processors (MVP's). The MVP is a general purpose digital signal processor (DSP) of Texas Instrument. It combines one floating-point processor and four fixedpoint DSP's on a single chip. The KICS uses the MVP as a primary processing element (PE). Two PE's form a cluster, and there are two processing clusters in the KICS. Real-time MPEG-2 encoder is implemented through the spatial and the functional partitioning strategies. Encoding process of spatially partitioned half of the video input frame is assigned to one processing cluster. Two PE's perform the functionally partitioned MPEG-2 encoding tasks in the pipelined operation mode. One PE of a cluster carries out the transform coding part and the other performs the predictive coding part of the MPEG-2 encoding algorithm. One MVP among five MVP's is used for system control and interface with host computer. This paper introduces an implementation ofthe MPEG-2 algorithm with a parallel processing architecture.
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