This paper demonstrates that the Chua Corsage Memristor, when connected in series with an inductor and a battery, oscillates about a locally-active operating point located on the memristor’s DC [Formula: see text]–[Formula: see text] curve. On the operating point, a small-signal equivalent circuit is derived via a Taylor series expansion. The small-signal admittance [Formula: see text] is derived from the small-signal equivalent circuit and the value of inductance is determined at a frequency where the real part of the admittance [Formula: see text] of the small-signal equivalent circuit of Chua Corsage Memristor is zero. Oscillation of the circuit is analyzed via an in-depth application of the theory of Local Activity, Edge of Chaos and the Hopf-bifurcation.
The Chua Corsage Memristor is the simplest example of a passive but locally active memristor endowed with two asymptotically stable equilibrium points [Formula: see text] and [Formula: see text] when powered by an E-volt battery, where [Formula: see text]. The basin of attraction is defined by [Formula: see text], [Formula: see text] for [Formula: see text], and [Formula: see text], [Formula: see text] for [Formula: see text]. By adding an inductor of appropriate value [Formula: see text] in series with the battery, the resulting circuit undergoes a supercritical Hopf bifurcation and becomes an oscillator for [Formula: see text]. Applying a sinusoidal voltage source [Formula: see text] across the Chua corsage memristor, one finds two distinct coexisting stable periodic responses, depicted by their associated pinched hysteresis loops, of the same frequency [Formula: see text] whose basin of attraction is defined by [Formula: see text], and [Formula: see text], respectively, where [Formula: see text] depends on both amplitude A and frequency f. An in-depth and comprehensive analysis of the above global nonlinear phenomena is presented using tools from nonlinear circuit theory, such as Chua’s dynamic route method, and from nonlinear dynamics, such as phase portrait analysis and bifurcation theory.
In this paper, we propose a memristor emulator that embraces most of features of a real memristor. The important features that a memristor emulator should include are a sufficiently wide range of memristance, bimodal operability of pulse and continuous signal inputs, a long period of nonvolatility, floating operation, operability with other devices, and the ability to be implemented with off-the-shelf devices. The proposed memristor emulator circuit contains all of these features. Specifically, the small variation range of memristance and the nonfloating operation that limit conventional memristor emulators are improved significantly. It is designed to be built with off-the-shelf electronics devices.
The memristance variation of a single memristor with voltage input is generally a nonlinear function of time. Linearization of memristance variation about time is very important for the easiness of memristor programming. In this paper, a method utilizing an anti-serial architecture for linear programming is addressed. The anti-serial architecture is composed of two memristors with opposite polarities. It linearizes the variation of memristance by virtue of complimentary actions of two memristors. For programming a memristor, additional memristor with opposite polarity is employed. The linearization effect of weight programming of an anti-serial architecture is investigated and memristor bridge synapse which is built with two sets of anti-serial memristor architecture is taken as an application example of the proposed method.
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