We report high performance p-type field-effect transistors based on single layered (thickness, ∼0.7 nm) WSe(2) as the active channel with chemically doped source/drain contacts and high-κ gate dielectrics. The top-gated monolayer transistors exhibit a high effective hole mobility of ∼250 cm(2)/(V s), perfect subthreshold swing of ∼60 mV/dec, and I(ON)/I(OFF) of >10(6) at room temperature. Special attention is given to lowering the contact resistance for hole injection by using high work function Pd contacts along with degenerate surface doping of the contacts by patterned NO(2) chemisorption on WSe(2). The results here present a promising material system and device architecture for p-type monolayer transistors with excellent characteristics.

Significance A new class of heterostructures consisting of layered transition metal dichalcogenide components can be designed and built by van der Waals (vdW) stacking of individual monolayers into functional multilayer structures. Nonetheless, the optoelectronic properties of this new type of vdW heterostructure are unknown. Here, we investigate artificial semiconductor heterostructures built from single-layer WSe 2 and MoS 2 . We observe spatially direct absorption but spatially indirect emission in this heterostructure, with strong interlayer coupling of charge carriers. The coupling at the hetero-interface can be readily tuned by inserting hexagonal BN dielectric layers into the vdW gap. The generic nature of this interlayer coupling is expected to yield a new family of semiconductor heterostructures having tunable optoelectronic properties through customized composite layers.

We report here the first degenerate n-doping of few-layer MoS2 and WSe2 semiconductors by surface charge transfer using potassium. High-electron sheet densities of ~1.0 × 10(13) cm(-2) and 2.5 × 10(12) cm(-2) for MoS2 and WSe2 are obtained, respectively. In addition, top-gated WSe2 and MoS2 n-FETs with selective K doping at the metal source/drain contacts are fabricated and shown to exhibit low contact resistances. Uniquely, WSe2 n-FETs are reported for the first time, exhibiting an electron mobility of ~110 cm(2)/V·s, which is comparable to the hole mobility of previously reported p-FETs using the same material. Ab initio simulations were performed to understand K doping of MoS2 and WSe2 in comparison with graphene. The results here demonstrate the need of degenerate doping of few-layer chalcogenides to improve the contact resistances and further realize high performance and complementary channel electronics.

Transition metal dichalcogenides, such as MoS2 and WSe2, have recently gained tremendous interest for electronic and optoelectronic applications. MoS2 and WSe2 monolayers are direct bandgap and show bright photoluminescence (PL), whereas multilayers exhibit much weaker PL due to their indirect optical bandgap. This presents an obstacle for a number of device applications involving light harvesting or detection where thicker films with direct optical bandgap are desired. Here, we experimentally demonstrate a drastic enhancement in PL intensity for multilayer WSe2 (2-4 layers) under uniaxial tensile strain of up to 2%. Specifically, the PL intensity of bilayer WSe2 is amplified by ∼ 35× , making it comparable to that of an unstrained WSe2 monolayer. This drastic PL enhancement is attributed to an indirect to direct bandgap transition for strained bilayer WSe2, as confirmed by density functional theory (DFT) calculations. Notably, in contrast to MoS2 multilayers, the energy difference between the direct and indirect bandgaps of WSe2 multilayers is small, thus allowing for bandgap crossover at experimentally feasible strain values. Our results present an important advance toward controlling the band structure and optoelectronic properties of few-layer WSe2 via strain engineering, with important implications for practical device applications.

Two-dimensional layered semiconductors present a promising material platform for band-to-band-tunneling devices given their homogeneous band edge steepness due to their atomically flat thickness. Here, we experimentally demonstrate interlayer band-to-band tunneling in vertical MoS2/WSe2 van der Waals (vdW) heterostructures using a dual-gate device architecture. The electric potential and carrier concentration of MoS2 and WSe2 layers are independently controlled by the two symmetric gates. The same device can be gate modulated to behave as either an Esaki diode with negative differential resistance, a backward diode with large reverse bias tunneling current, or a forward rectifying diode with low reverse bias current. Notably, a high gate coupling efficiency of ∼80% is obtained for tuning the interlayer band alignments, arising from weak electrostatic screening by the atomically thin layers. This work presents an advance in the fundamental understanding of the interlayer coupling and electron tunneling in semiconductor vdW heterostructures with important implications toward the design of atomically thin tunnel transistors.

A novel strategy for preparing large‐area, oriented silicon nanowire (SiNW) arrays on silicon substrates at near room temperature by localized chemical etching is presented. The strategy is based on metal‐induced (either by Ag or Au) excessive local oxidation and dissolution of a silicon substrate in an aqueous fluoride solution. The density and size of the as‐prepared SiNWs depend on the distribution of the patterned metal particles on the silicon surface. High‐density metal particles facilitate the formation of silicon nanowires. Well‐separated, straight nanoholes are dug along the Si block when metal particles are well dispersed with a large space between them. The etching technique is weakly dependent on the orientation and doping type of the silicon wafer. Therefore, SiNWs with desired axial crystallographic orientations and doping characteristics are readily obtained. Detailed scanning electron microscopy observations reveal the formation process of the silicon nanowires, and a reasonable mechanism is proposed on the basis of the electrochemistry of silicon and the experimental results.

Semiconductor nanowires are promising candidates for future applications in electronics and photonics. Silicon nanowires are attracting much attention due to their technical compatibility with existing semiconductor technology. [1,2] Silicon nanowires have been successfully incorporated in field effect transistors, [3] chemical sensors, [4] and field emitters.[5]However, for device applications, one important challenge that needs to be overcome is obtaining precise control of the size, crystallographic orientation, location, and packing manner of the nanowires. Much research effort has been devoted to the fabrication and applications of silicon nanowires. Usually, silicon nanowires are grown with random orientations and further processing is required to assemble the nanowires for specific applications. [6][7][8][9] Recently, the orientationcontrolled growth of silicon nanowire arrays, [10,11] and the controlled growth of silicon nanowires in predetermined configurations [12] has been illustrated. Here, we show that large-area silicon nanowire arrays with controlled size, orientation, and packing density can be fabricated with a high throughput by a convenient method. While catalytic etching has been successfully developed as a method to fabricate silicon nanowires with uniform crystallographic orientation, this process still does not allow reliable control over the location and size of the nanowires. [13][14][15] By combining catalytic etching with the widely used nanosphere lithography method, [16,17] we have fabricated large-scale SiGe quantum dot arrays with a controlled diameter, height, and density.[18] Here, we show the large-scale fabrication of silicon nanowire arrays, which have many different applications, including as field emitters, [5] photonic crystals, [19] and vertical field effect transistors. [20] The diameter, height of individual nanowires, and the center-to-center distance between nanowires have been accurately controlled.The overall fabrication process is schematically depicted in Figure 1. First, the template, consisting of a monolayer of polystyrene (PS) spheres, is allowed to self-assemble on a Si substrate. Subsequently, a reactive ion etching (RIE) process is used to reduce the diameter of the PS spheres, which leads to the formation of colloidal particle arrays that are no longer close-packed. In the next step, a silver film is thermally evaporated onto the silicon substrate as a catalyst. Owing to the PS monolayer mask, a Ag film with a hexagonal array of holes is formed. The diameters of the holes match that of the diameter-reduced PS spheres. Subsequently, an etching step is conducted in a mixture of deionized water, HF, and H 2 O 2 . The Ag film catalyzes the etching of silicon beneath it. During the etching process, the "walls" of the honeycomb are gradually etched away and the remnant silicon forms a nanowire array. Finally, the PS spheres are removed by dissolution in CHCl 3 , and the Ag film is dissolved in boiling aqua regia. Figure 2 shows scanning electron microscopy (SEM) ...

Abstract-The development of low-resistance source/drain contacts to transition metal dichalcogenides (TMDCs) is crucial for the realization of high-performance logic components. In particular, efficient hole contacts are required for the fabrication of p-type transistors with MoS2, a model TMDC. Previous studies have shown that the Fermi level of elemental metals is pinned close to the conduction band of MoS2, thus resulting in large Schottky barrier heights for holes with limited hole injection from the contacts. Here, we show that substoichiometric molybdenum trioxide (MoOx, x<3), a high workfunction material, acts as an efficient hole injection layer to MoS2 and WSe2. In particular, we demonstrate MoS2 p-type field-effect transistors and diodes by using MoOx contacts. We also show drastic on-current improvement for p-type WSe2 FETs with MoOx contacts over devices made with Pd contacts, which is the prototypical metal used for hole