The authors previously have reported on the "ring gate delay" system which digitim the infinitesimal time interval with the delay time of the inverter as the resolution, without using the high-speed reference clock [ 11. A problem then is the improvement of the accuracy since the delay time of the inverter depends on various conditions such as the ambient temperature, the supply voltage, and the fabrication condition. To remedy this point, an LSI is constructed and the delay time of the original circuit is monitored continuously using the quartz oscillation clock of a relatively low frequency as the reference, and the time to be measured is digitized with a high accuracy based on the delay time. In this system, it is not necessary to control the delay time, which makes it possible to utilize the shortest delay time.By a single measurement process using a single input port, up to four pulses can be measured consecutively. If the pulse interval to be measured in less than the specified time, the pulses are combined into a single pulse and an incorrect operation is prevented.In this study, a sample device is constructed by a 1.5-pm CMOS process. The measurement range of 2200 ns (12 bit) with the time resolution 0.5 ns is achieved using the supply voltage of 5 V. The minimum pulse interval that can be measured is 55 ns (at 25°C). The reference clock used is 2 MHz. The number of transistors is 15,000 and the chip size is 3.5 mm X 3.8 mm. The constructed LSI is composed totally of digital circuits. The operation is robust against the environmental condition, and a stable operation is realized for the ambient temperature of -35 to 140°C.
For achieving a highly-durable sensor ASIC with high performance and low cost, an all-digital sensor ADC using a time-domain processor TAD (Time A/D converter) is presented. Generally, measuring travel time of signals (e.g., light pulses, radio and ultrasonic waves, etc.) should be done under various stringent conditions (i.e., high ambient temperature) in automobiles, heavy-machinery and resource exploration systems, for example. Therefore, to realize wide-range temperature durability, sensor ADC circuits should be fully-digital, including a ring-delay-line (RDL) driven by an input voltage V in for its power supply, along with an RDL frequency counter, latch and encoder. In this study, an ADC core is implemented with 0.26 mm 2 in a low-cost 0.35-μm digital CMOS applying our original 2-CKES (clock edge shift) method for higher resolution. When detecting low-level noisy signals received, a high-speed sensor ADC with a voltage resolution of 10.9 mV/LSB (6.5bit, 40MS/s) is available for integrating received pulse/wave amplitude to determine signal-travel time in a wide temperature range between -40 and 125°C. In addition, the all-digital architecture TAD is suitable for porting and scaling to another silicon technology with minimal IC design term and cost. As a scaling result, using a test-IC in a 0.18-μm digital CMOS, we have also experimentally confirmed its stable operations between -40 and 125°C with a smaller active area (0.044mm 2 ) and higher resolutions, resulting in 0.15mV/LSB (1MS/s).
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