The proposed work based on the simulation studies for the effect of different width size of transistor on output voltage drop and internal resistance in CMOS rectifier. This paper presents the CMOS rectifier by using two PMOS and NMOS configuration and gives information about miniaturization technology. Hence, increase the width size from 4µm to 1100µm of PMOS and NMOS transistors. The results for 1100µm are 1.20V is better than 750µm width size, and also minimize the internal resistance from 6.17Ω to 4.580Ω in CMOS rectifier. The model was designed and simulated using Microwind software and operated at a frequency of 50Hz with an AC voltage source. A circuit was fabricated with 0.35µm CMOS technology.
This paper presents the study and survey analysis on different width size of transistor in CMOS rectifier for output voltage drop. The paper gives information about miniaturizing the CMOS rectifier using two PMOS and NMOS configuration. This investigation focuses on the effect of the width-to-length ratio by using 0.35µm technology. Therefore, increase the width size and minimize the internal resistance. The model is operated at a frequency of 50Hz with an AC voltage source. CADENCE software is used for simulation and designing work.
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