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The purpose of this study was to design a light-weight sandwich panel for trailers. Strength calculations and selection of different materials were carried out in order to find a new solution for this specific application. The sandwich materials were fabricated using vacuum infusion technology. The different types of sandwich composite panels were tested in
4-point bending conditions according to ASTM C393/C393M. Virtual testing was performed by use of ANSYS software to simplify the core material selection process and to design the layers. 2D Finite element analysis (FEA) of 4-point bending was made with ANSYS APDL (Classic) software. Data for the FEA was obtained from the tensile tests of glass fiber plastic (GFRP) laminates. Virtual 2D results were compared with real 4-point bending tests.  3D FEA was applied to virtually test the selected sandwich structure in real working conditions. Based on FEA results the Pareto optimality concept has been applied and optimal solutions determined.

DOI: http://dx.doi.org/10.5755/j01.ms.18.1.1340

Glass fibre reinforced plastic (GFRP) scrap consisted of acrylic plastic with glass fibre reinforcement in polyester resin matrix was used in our experiments. The multi-functional DS-series disintegrator mills were used for mechanical processing of GFRP scrap. Preceding from the results characterization of the milled powder particles size, shape and other properties the numerical algorithm for modelling of the density of the new filler material was developed. The main goal of the current study is to develop new particulate filled composite plastic material from recycled GFRP scrap. With recovered plastic powder material the higher filler content in polyester resin matrix can be achieved. The new composite is modelled on basis of the properties of new material. Such an approach requires tests of the new material. The considered target characteristics of the new material are the tensile strength, elongation at break and the cost. The multicriteria optimization problem has been formulated and solved by use of physical programming techniques and Pareto optimality concept. The designed new composites were manufactured in different mixing ratios of powder and binder agent. The strength and stiffness properties of new composite material were tested.

http://dx.doi.org/10.5755/j01.ms.17.3.593

for high-volume application-specific integrated circuit (ASIC) design relies on the use of programmable digital signal processing cores. Combining these dedicated, highperformance DSP engines with data and program memories and a selected set of peripherals yields a highly integrated system on a chip. Rapidly evolving silicon technologies and improving design tools are the key enablers of this approach, allowing system engineers to pack impressive amounts of functionality into a system within a reasonable development time. According to an embedded-processor market survey, 1 more than two thirds of high-volume embedded systems will be based on specialized DSP cores by the end of this decade.This approach offers many advantages. Unlike conventional methods, DSP-corebased ASIC design combines the benefits of a standard off-the-shelf DSP and optimized custom hardware. As a direct result of higher integration, it reduces unit cost, an increasingly important issue in sensitive market areas such as telecommunications and personal computing. Equally important are the improved reliability and impact on time to market of the core approach. The shrinking life span of DSP-based products forces very tight schedules that leave little time for redesign. As software content in modern signal processing applications increases, system complexity typically becomes very high. To realize target applications on schedule, sys-tem engineers must exploit the benefits of DSP cores-programmability, software libraries, and development tools-as fully as possible.Because software functions alone are not sufficient for many applications, a wide range of peripherals is available for corebased systems. In addition to essential RAM and ROM, core-based designs can include special types of memories such as FIFO, multiport, and Flash. Also available are highspeed serial buses (UART, I2C, USB), dedicated bus controllers (PCI, SCSI), A/D and D/A converters, and other special I/Os to interface the system with the off-chip world. 2 Other examples of the most common peripheral circuitry are timers, DMA controllers, and miscellaneous analog circuitry.Much larger and more complex functional entities, also called cores, are available for use as embedded on-chip peripherals. The broad diversity of these cores ranges from RISC microprocessors to dedicated discrete cosine transform (DCT) engines. 3 Moreover, system engineers can improve system performance significantly by designing a block of custom hardware outside the DSP core to implement special functionality for the application at hand.A number of issues affect the selection of a DSP core for an ASIC design. From the fabrication point of view, the alternatives are foundry-captive and licensable cores. 4 Most foundry-captive cores are derived from popular off-the-shelf counterparts and provid-

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