This paper describes a reduced-swing intemal bus scheme for ultra-low-power LSIs. A data-dependent logic swing bus reduces its power dissipation to 1/16 that of a conventional bus when used for a 16-bit-wide bus. A dual-reference-senseamplifying receiver converts a reduced-swing bus signal to a CMOS-level signal without loss of noise margin or speed. Experimental circuits fabricated using 0.5-p-n CMOS process verify the low-power operation of the proposed bus scheme.
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