U i s poper introduces an imrovririve lrig/i-ievel method to estimate aicrgy consumption of a well hiown farnib of aqnchronous circuitr ut CSP Iewl. therefore renloviug the need for per$orniing time cowming SPICE simulatiorr. Oiu method is based 011 lrmsition count and M p s die PCHBJ'CFB !emplate bosed (201 aqmchronous circuit designers io huw an early cstinmtion of power with ihe acnrracy of mum than 80%. This evlimation. obtained from commnercial fumtiord simlutors, timy lead 10 power optiniiiution oflhe circuit iri high levels of desigti.
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