We report Al 2 O 3 /In 0.53 Ga 0.47 As MOSFETs having both self-aligned in situ Mo source/drain ohmic contacts and self-aligned InAs source/drain n + regions formed by MBE regrowth. The device epitaxial dimensions are small, as is required for 22-nm gate length MOSFETs; a 5-nm In 0.53 Ga 0.47 As channel with an In 0.48 Al 0.52 As back confinement layer and the n ++ source/drain junctions do not extend below the 5-nm channel. A device with 200-nm gate length showed I D = 0.95 mA/μm current density at V GS = 4.0 V and g m = 0.45 mS/μm peak transconductance at V DS = 2.0 V. Index Terms-InAs source/drain, InGaAs MOSFET, migration-enhanced epitaxial regrowth, source/drain regrowth, III-V MOSFET.
The authors report ultralow specific contact resistivity (ρc) in nonalloyed, in situ Ohmic contacts to heavily doped n-type In0.53Ga0.47As:Si layers with 6×1019cm−3 active carrier concentration, lattice matched to InP. The contacts were formed by depositing molybdenum (Mo) immediately after the In0.53Ga0.47As growth without breaking vacuum. Transmission line model measurements showed a contact resistivity of (1.1±0.6)×10−8Ωcm2 for the Mo∕InGaAs interface. The contacts show no observable degradation in resistivity after annealing at 300 and 400°C for 1min duration.
The influence of different gate metal deposition processes on the electrical characteristics of dielectric/III-V interfaces is investigated. Al 2 O 3 and HfO 2 dielectrics are grown on In 0.53 Ga 0.47 As channels and top metal electrodes are deposited by either thermal evaporation or electron beam deposition. It is shown that metal-oxide-semiconductor capacitors with electron beam evaporated electrodes exhibit substantially larger midgap interface trap densities than those with thermally evaporated electrodes. The damage caused by electron beam metallization can be mitigated by subsequent, long anneals in forming gas.
The authors report ultralow specific contact resistivity (ρc) in ex situ Ohmic contacts to n-type In0.53Ga0.47As (100) layers, with an electron concentration of 5×1019 cm−3. They present the ρc obtained for molybdenum (Mo) contacts to n-type In0.53Ga0.47As, with the semiconductor surface cleaned by atomic H before metal deposition. The authors compare these data with the ρc obtained for contacts made without atomic H cleaning. After exposure to air during normal device processing, the semiconductor surface was prepared by UV-ozone exposure plus a dilute HCl etch and subsequently exposed to thermally cracked H. Mo contact metal was deposited in an electron beam evaporator without breaking vacuum after H cleaning. Transmission line model measurements showed a contact resistivity of (1.1±0.9)×10−8 Ω cm2 for the Mo/In0.53Ga0.47As interface. This ρc is equivalent to that obtained with in situ Mo contacts [ρc=(1.1±0.6)×10−8 Ω cm2]. Ex situ contacts prepared by UV-ozone exposure plus dilute HCl (without any atomic H exposure) result in ρc=(1.5±1.0)×10−8 Ω cm2.
bandwidth; their breakdown is much larger than that of highly Abstract-We examine the limits in scaling of InP-based scaled MOSFETs. This is an advantage for both mixed-signal bipolar and field effect transistors for increased device ICs and mm-wave power amplifiers. bandwidth. With InP-based HBTs, emitter and base contact Consequently, despite the competitive pressure from resistivities and IC thermal resistance are the major limits to CMOS, InP IC processes may survive in high-performance increased device bandwidth; devices with 1-1.5 THz . '. simultaneous f, and fmax are feasible. Major challenges faced in app lcatins tha lowinatdegiocaes, mucas the GaAs developing either InGaAs HEMTs having THz cutoff frequencies HBT remains the dominant device for cellular telephone or InGaAs-channel MOSFETs having drive current consistent power amplifiers. Further, InP HBTs appear to be far from with the 22 nm ITRS objectives include the low two-dimensional their scaling limits, and cutoff frequencies beyond 1.5 THz effective density of states and the high bound state energies in appear to be feasible; this suggests new potential applications narrow quantum wells. at sub-mm-wave frequencies. Much broader markets may be found for InP-based I. INTRODUCTION electronics. Given the present understanding of the difficulties H IGH -frequency integrated circuit technologies face faced in scaling Si MOSFETs to < 22 nm gate length Lg, relentless pressure from CMOS. 90 nm Silicon CMOS alternative channel materials --including InGaAs [4,5,6,7] --processes exhibit A450 GHz power-gain cutoff frequencies are being considered for using in future MOS transistors in (fmax) [1]. 45 nm processes, to be released into production very-large scale ICs. The transport advantages of InGaAs this summer [2], will employ metal gates and high-K gate channels --high mobilities and high carrier velocities--are dielectrics, features which benefit both VLSI digital circuit offset by several scaling difficulties associated with the low performance and mm-wave amplification.Given the electron effective mass. Examining these scaling limits is anticipated dates of introduction of 32 nm and 22 nm relevant to the potential application of InGaAs to VLSI processes [2], it is likely that Si CMOS IC processes will MOSFETs, and is equally relevant to the scaling potential of< provide transistors with >1 THz ft and fmax within the next 35 nm Lg InGaAs HEMTs. four years. This places Si CMOS as a formidable competitive threat, not only to InP bipolar and field-effect transistors, but II. INP BIPOLAR TRANSISTORS also to SiGe bipolar transistors. InP HBTs have potential application in high-resolutionDespite this rapid improvement in CMOS bandwidth, ADCs and DACs with sampling rates in the range of 1-10 bipolar and InP processes retain significant advantages over Si GS/s, in -100 GHz gain-bandwidth product operational MOS in analog/mixed-signal and microwave/mm-wave amplifiers for microwave signal processing, and in mm-wave circuits. The high output conductance, limited g,, ...
Control of faceting during epitaxy is critical for nanoscale devices. This work identifies the origins of gaps and different facets during regrowth of InGaAs adjacent to patterned features. Molecular beam epitaxy (MBE) near SiO 2 or SiN x led to gaps, roughness, or polycrystalline growth, but metal modulated epitaxy (MME) produced smooth and gapfree "rising tide" (001) growth filling up to the mask. The resulting self-aligned FETs were dominated by FET channel resistance rather than source-drain access resistance.
As silicon CMOS reaches its scaling limits, alternative materials become more attractive. Dielectric thickness and parasitic resistance and capacitance do not scale well, so "more than Moore" scaling is required even to keep up with Moore's Law. Replacing Si MOSFET channels on a short time scale (3-6 years) raises significant challenges for any proposed material or device structure. New materials must be compatible with Si CMOS fabrication. In(1-x)Ga(x)As based MOSFETs offer higher carrier velocities than Si, plus contact resistivities below 1E-8 ohm-cm^2, mature processing, and straightforward heterostructure confinement for vertical scaling, and additional degrees of freedom in composition and heterostructure for future scaling. Self-aligned source-drain regrowth places contact metal within 30 nm of the channel, reducing access resistance. Here we demonstrate InGaAs channels with self-aligned regrowth of source/drain contacts. This work led to depletion mode InGaAs MOSFETs with peak transconductance of 0.24 mS/micron.
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