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In this paper a new approach to the yield evaluation of electronic circuits is presented. It is a divide-and-conquer algorithm based on interval arithmetic that allows one to reliably mark as feasible or unfeasible those hyper-rectangles that are completely in or out of the region of acceptability. In addition, it identifies any portion of the boundaries of the region of acceptability that is included in the tolerance region and refines the analysis across it. The proposed technique guarantees an efficient, reliable and accurate evaluation of the yield, even in presence of a non-convex and non-simply connected region of acceptability. Thanks to its capacity to quickly detect the boundary of the region of acceptability, it is proposed as a useful tool for tolerance design. The example presented shows the features of the approach

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