Abstract:The field of socially assistive robotics is growing but has not yet been properly defined and circumscribed. There has been significant attention given to and great progress made in contact assistive robotics. Currently, there is no clear definition of robots that provide assistance through interaction and without physical contact, namely socially assistive robotics. Assistive robots in smart home environments have been suggested as possible cost-effective care solutions to demographic changes characterized by an increasingly elderly population. The vision is that service robots are available in the home to help and assist elderly residents. This paper proposes a smart home companion robot -CYBORG. This robot can be used to save power to switch off unnecessary lights. It can be used as an alarm to remind the family members about important activities. It will also help people clean their homes and water plants. The key feature is that the interface for all the functions will be simple allowing elderly people or their relatives make the robot learn activities in the smart home and teach it to carry out behaviours in response to these activities. This mechanism provides support, assistance and active engagement over time along with personalization.
Digital signal processing hardware uses digit serial arithmetic when latency can be traded off for higher clock speeds, resource and input-output utilization. Floating-point representations are important when dealing with very large data sets or sets where data range may be unpredictable as these representations may have a larger dynamic range. Field Programmable Gate Array architectures make them suitable as hardware accelerators for implementing high performance floating-point computations. In this paper, a number of improved designs for Radix-2 h online floating-point multiplication are presented, analysed and compared on the basis of latency, throughput, cycle time and resource utilization. The architecture of a novel online floating-point multiplier using an interleaved number representation that results in an increased throughput and has the advantage of carrying out normalization for overflow with reduction in cycle time, resource utilization and latency is also presented.
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