The ability of various arrays of micro pin-fins to reduce maximum temperature of an integrated circuit with a 4 × 3 mm footprint and a 0.5 × 0.5 mm hot spot was investigated numerically. Micro pin-fins having circular, symmetric airfoil and symmetric convex lens cross sections were optimized to handle a background uniform heat flux of 500 W cm−2 and a hot spot uniform heat flux of 2000 W cm−2. A fully three-dimensional conjugate heat transfer analysis was performed and a multi-objective, constrained optimization was carried out to find a design for each pin-fin shape capable of cooling such high heat fluxes. The two simultaneous objectives were to minimize maximum temperature and minimize pumping power, while keeping the maximum temperature below 85 °C. The design variables were the inlet average velocity and shape, size and height of the pin-fins. A response surface was generated for each of the objectives and coupled with a genetic algorithm to arrive at a Pareto frontier of the best trade-off solutions. Stress–deformation analysis incorporating hydrodynamic and thermal loads was performed on the three Pareto optimized configurations. Von-Mises stress for each configuration was found to be significantly below the yield strength of silicon.
Two-layer single phase flow microchannels were studied for cooling of electronic chips with a hot spot. A chip with 2.45 × 2.45 mm footprint and a hot spot of 0.5 × 0.5 mm in its center was studied in this research. Two different cases were simulated in which heat fluxes of 1500 W cm−2 and 2000 W cm−2 were applied at the hot spot. Heat flux of 1000 W cm−2 was applied on the rest of the chip. Each microchannel layer had 20 channels with an aspect ratio of 4:1. Direction of the second microchannel layer was rotated 90 deg with respect to the first layer. Fully three-dimensional (3D) conjugate heat transfer analysis was performed to study the heat removal capacity of the proposed two-layer microchannel cooling design for high heat flux chips. In the next step, a linear stress analysis was performed to investigate the effects of thermal stresses applied to the microchannel cooling design due to variations of temperature field. Results showed that two-layer microchannel configuration was capable of removing heat from high heat flux chips with a hot spot.
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