Geometric considerations of the two-dimensional projection of the three-dimensional visual field led to hypotheses about the possible effect on depth perception of: relative height in the picture plane, the type of supplied reference plane, and angle of regard. In three experiments Ss viewed pairs of equidistant, horizontal rods in front of one of four backgrounds, with either an upward or downward angle of regard. The results confirm the hypothesis that relative height can operate to influence depth perception, that the type of background influences depth perception in the predicted direction, and that a response set resulting in a tendency for Ss to see higher objects as farther irrespective of the reference plane also occurs. The effects of angle of regard and of degree of vertical separation were not completely elucidated.
Two market trends that have been evident for some time are increasing microprocessor speeds and the increasing demand for additional functionality in electronic systems. These market trends in turn are driving the need for increased memory density and higher performance memory in systems such as personal computers, laptop computers and servers. To address these requirements, memory module manufacturers are looking to technologies capable of meeting these dual demands and at the same time keep overall costs trending down. New generations of dynamic random access memory (DRAM) such as Double Data Rate (DDR) and next generation DDR2 technologies are contributing significantly toward increased system performance. Several options, including Tessera's stacked chip scale packaging (CSP), have been developed to address these high density memory and performance requirements.Several critical issues surround this effort to increase the density and performance of electronic products. Form factor, electrical performance, thermal performance, reliability, cost and manufacturability. Future potential for higher density package technology will be outlined as it relates to trends in high density and high performance market needs. The following will examine the company's µZ™ Ball Stack package design, assembly methodology and performance requirements associated with Small-Outline, Dual-Inline Memory Module (SO-DIMM) applications and environmental stress test results for several µZ-Ball Stack package configurations. Market Drivers for Higher Density MemoryDemands for increased memory and miniaturization in electronics have led the packaging industry to develop a number of innovative solutions to meet these demands. The transition to CSP has already resulted in semiconductor packages being reduced to a size that is only slightly larger than the semiconductor chip. With the advent of 3D packaging, densification and miniaturization has now been taken to the next level offering solutions that utilize the vertical or 'Z' dimension to make better use of space that is available for component mounting. Target Applications for Higher Density Memory:• Dual In-line Memory Modules • Small Outline Memory Modules • Application Specific Memory • High-End Computing and Graphic Workstations • Ruggedized Hard Drives • MP3 Players and Cell Phones 3D Memory Package Performance CriteriaUntil recently, the component packaging industry did not directly concern itself about system level performance. This has increasingly becoming an issue and is evidenced by the restriction on the number of DIMM assemblies that can be designed onto the motherboard due to performance reasons. The first aspect of performance analysis is to characterize the performance of a single die Fine-pitch BGA (FBGA) package as a reference for comparing the Z-Ball Stack package performance. For this analysis, a DDR333 device in a single die FBGA package was used having a maximum inductance value of 3.188 nH and a value of capacitance 0.287 pF,. For an equivalent TSOP package, the value...
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