A direct conversion 802.1 la receiver front-end including a synthesizer with quadrature VCO has been integrated in a 0.13pm CMOS process. The chip has an active area of l.8mm2 with the entire RF portion operated from 1.2V and the low frequency portion operated from 2.W. Its key feature is a current driven passive mixer with a low impedance load that achieves a low l/f noise comer. Measured noise figure is 3.5dB with a lif noise comer at 2OOkH2, and an IIP3 of -2dBm. The synthesizer DSB phase noise integrated over a lOMHz band is less than -36dBc. The front end repotted here has one of the lowest power consumption and 1 if noise comer at 5GHz in pure CMOS ever reported so far.
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