With the rapid development of Internet of Things (IoT) technologies, traditional disease diagnoses carried out in medical institutions can now be performed remotely at home or even ambient environments, yielding the concept of the Internet of Health Things (IoHT). Among the diverse IoHT applications, inertial measurement unit (IMU)-based systems play a significant role in the detection of diseases in many fields, such as neurological, musculoskeletal, and mental. However, traditional numerical interpretation methods have proven to be challenging to provide satisfying detection accuracies owing to the low quality of raw data, especially under strong electromagnetic interference (EMI). To address this issue, in recent years, machine learning (ML)-based techniques have been proposed to smartly map IMU-captured data on disease detection and progress. After a decade of development, the combination of IMUs and ML algorithms for assistive disease diagnosis has become a hot topic, with an increasing number of studies reported yearly. A systematic search was conducted in four databases covering the aforementioned topic for articles published in the past six years. Eighty-one articles were included and discussed concerning two aspects: different ML techniques and application scenarios. This review yielded the conclusion that, with the help of ML technology, IMUs can serve as a crucial element in disease diagnosis, severity assessment, characteristic estimation, and monitoring during the rehabilitation process. Furthermore, it summarizes the state-of-the-art, analyzes challenges, and provides foreseeable future trends for developing IMU-ML systems for IoHT.

A low power clock recovery circuit for passive HF RFID tag is presented. The proposed clock recovery circuit, based on the architecture of Phase Locked Loop (PLL), is used to generate a stable system clock when communication occurs from interrogator to tag with 100% ASK modulation. An envelope detector is designed to detect the incident power from interrogator and control the operating state of the proposed clock recovery circuit. Loop bandwidth of PLL circuits is minimized to reduce the frequency deviation when operating in frequency maintaining state. Furthermore, an initialization circuit for loop filter is also used to speed up locking during initial system power-on-reset. Prototype chips have been fabricated in 0.35 lm 2P4M CMOS technology. A total current consumption of 3 lA has been achieved in the frequency maintaining state. Measurement results show that, when communication occurs from interrogator to tag with 100% ASK modulation, clock recovery circuit generates a stable and consecutive system clock and has an inevitable frequency derivation of 7.5% when operating in frequency maintaining state.

No abstract