This article reports on the first demonstration of distributed amplifier monolithic microwave integrated circuits (MMICs) with a bandwidth (BW) of more than 300 GHz. The three presented circuits utilize a uniform traveling-wave amplifier topology with six, eight, and ten unit cells, respectively. In this article, the impact of the connection between the gate line and the transistors on the achievable performance is investigated. It is demonstrated that a short connection clearly provides a more favorable combination of BW, input matching, and losses on the gate line. Thus, it is possible to extend the BW beyond 300 GHz while utilizing transistors with a gate width of 2 × 10 µm. The MMICs are fabricated in a 35-nm gate-length InGaAs metamorphic high-electron-mobility transistor technology. The MMIC with six unit cells exhibits a noise figure (NF) between 3.5 and 8.2 dB for a noise-optimized bias from 1 GHz up to the measurement limit of 308 GHz. The MMIC with ten unit cells achieves a minimum NF of 2 dB for frequencies of around 50 GHz and stays below 10 dB for the entire band. Furthermore, for a power-optimized bias, the same circuit generates an output power between 8.7 and 14.8 dBm for a frequency range from 1 to 250 GHz.
In this article, we summarize the theoretical matching boundaries and show the limitations they implicate for real-world amplifier design. Starting with a common schematic prototype, we investigate the question of how to realize its electrical response in a densely routed, massively parallelized layout. To that end, we develop a comprehensive study on the application of space-mapping techniques toward the design of high-power amplifiers (HPAs). We derive three reference design procedures and compare their performance in terms of convergence, speed, and practicality when laying out a densely routed HPA interstage matching network. Subsequently, we demonstrate the usefulness of the study by designing the networks of a compact three-stage eight-way wideband HPA in the Ka-band. The processed monolithic microwave integrated circuit features a 1-dB large-signal bandwidth of more than 11 GHz (a fractional bandwidth of 32.8%) and thus covers most of the Ka-band with an output power exceeding 6 W in 3 dB of gain compression. This demonstrates the highest combination of power and bandwidth to date using a reactively matched topology in the Ka-band.
This article reports on a gallium-nitride (GaN) low-noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) with a 3-dB gain bandwidth (BW) from 63 to 101 GHz. The MMIC is fabricated in the Fraunhofer IAF 70-nm GaN-on-silicon-carbide (SiC) high-electron-mobility transistor (HEMT) technology. The four-stage common-source LNA exhibits an average noise figure (NF) of 3 dB for a measured frequency range from 75 to 101 GHz. The MMIC reaches a minimum NF of 2.8 dB at an operating frequency of 83 GHz. A mapping of two 100-mm wafers shows an excellent homogeneity with an 86% yield and an average NF of 3-3.3 dB. At 100 GHz, the LNA obtains output-referred 1-dB compression and third-order intercept points of 12.1 and 14.4 dBm, respectively. Furthermore, comprehensive investigations of the bias dependence of all measured performance parameters provide an insight into the presented device and LNA. To the best of the authors' knowledge, this MMIC demonstrates the lowest NF among GaN LNAs at E/W-band frequencies.
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