The ABCD3TA is a 128-channel ASIC with binary architecture for the readout of silicon strip particle detectors in the Semiconductor Tracker of the ATLAS experiment at the Large Hadron Collider (LHC). The chip comprises fast front-end and amplitude discriminator circuits using bipolar devices, a binary pipeline for first level trigger latency, a second level derandomising buffer and data compression circuitry based on CMOS devices. It has been designed and fabricated in a BiCMOS radiation resistant process. Extensive testing of the ABCD3TA chips assembled into detector modules show that the design meets the specifications and maintains the required performance after irradiation up to a total ionising dose of 10 Mrad and a 1-MeV neutron equivalent fluence of 2×1014 n/cm2, corresponding to 10 years of operation of the LHC at its design luminosity. Wafer screening and quality assurance procedures have been developed and implemented in large volume production to ensure that the chips assembled into modules meet the rigorous acceptance criteria
Results are reported from beam test measurements of one of the first commercial prototype gallium arsenide microstrip detectors. The detector consisted of 128 strips on a 50µm pitch, with a wafer thickness of 200µm. Operating at a bias of 180V, the detector produced a signal to noise ratio of 19 to 1, with a particle detection efficiency of better than 99%. The spatial resolution of the detector was measured as 14.6µm without charge sharing effects. Charge sharing between pairs of strips was seen to improve the spatial resolution, with an average value for all events of 10.4µm.
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