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Node-agnostic Cu TSVs integrated with high-K/metal gate and embedded DRAM were used in functional 3D modules.Thermal cycling and stress results show no degradation of TSV or BEOL structures, and device and functional data indicate that there is no significant impact from TSV processing and/or proximity.

Low-k time-dependent dielectric breakdown (TDDB) is rapidly becoming one of the most important reliability issues in Cu/low-k technology development and qualification. Although considerable progress has been made in recent years in addressing the electric field dependence of low-k time-to-breakdown (t BD ), there has been very little comprehensive work done on the effect of metal area and line spacing on low-k TDDB. The lifetime of a product chip is typically obtained by extrapolating TDDB data from small test structures to large chip areas, and the low-k TDDB line spacing scaling rule normally should be considered for the definition of operating voltages for various technologies to assure long-term reliability. Therefore, both area scaling and line spacing scaling relations are of great importance, in order to have a robust technology qualification. In this study, a thorough investigation into the 45 nm low-k SiCOH TDDB was conducted in order to understand the breakdown failure statistics, to model the area dependence, and to explore the line spacing scaling. With the help of experimental results and computational simulations, the effect of line-to-line spacing on low-k TDDB was clearly identified and a methodology for accurate determination of Weibull shape factor is proposed. [

With wide application of low-dielectric constant (low-k) dielectric materials in multilevel VLSI circuits, the long-term reliability of such materials is rapidly becoming one of the most critical challenges for technology development. Among all the reliability issues, low4 time dependent dielectric breakdown (TDDB) is commonly considered a crucial problem. In this study, the effect of process variations on chemical-vapor deposited (CVD), carbon doped oxide dielectrics comprised of Si, C, 0, and H (SiCOH) TDDB degradation at the 65nm technology node is investigated. SiCOH TDDB is found to be sensitive to all aspects of integration.Based on extensive experimental data, an electrochemical-reactioninduced, three-step degradation model is proposed to explain the SiCOH dielectric breakdown process. Finally, we demonstrate that with careful process and materials optimization, a superior SiCOH TDDB performance at the 65nm technology node can be achieved for 300" fabrication. The projected lifetime, based on a conservative modeling approach and aggressive test structure is far beyond the most stringent reliability target. [

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