Increasing quantum circuit fidelity requires an efficient instruction set to avoid errors from decoherence. The choice of a two-qubit (2Q) hardware basis gate depends on a quantum modulator's native Hamiltonian interactions and applied control drives. In this paper, we propose a collaborative design approach to select the best ratio of drive parameters that determine the best basis gate for a particular modulator. This requires considering the theoretical computing power of the gate along with the practical speed limit of that gate, given the modulator drive parameters. The practical speed limit arises from the couplers' tolerance for strong driving when one or more pumps is applied, for which some combinations can result in higher overall speed limits than others. Moreover, as this 2Q basis gate is typically applied multiple times in succession, interleaved by 1Q gates applied directly to the qubits, the speed of the 1Q gates can become a limiting factor for the quantum circuit. We propose a parallel-drive approach that drives the modulator and qubits simultaneously, allowing a richer capability of the 2Q basis gate and in some cases for this 1Q drive time to be absorbed entirely into the 2Q operation. This allows increasingly short duration 2Q gates while mitigating a significant source of overhead in some quantum systems. On average, this approach can decrease circuit duration by 17.84% and decrease infidelity for random 2Q gates by 10.5% compared to the best basic 2Q gate, √ iSWAP.
Noisy, Intermediate Scale Quantum (NISQ) computers have reached the point where they can show the potential for quantum advantage over classical computing. Unfortunately, NISQ machines introduce sufficient noise that even for moderate size quantum circuits the results can be unreliable. We propose a collaboratively designed superconducting quantum computer using a Superconducting Nonlinear Asymmetric Inductive eLement (SNAIL) modulator. The SNAIL modulator is designed by considering both the ideal fundamental qubit gate operation while maximizing the qubit coupling capabilities. We and others have demonstrated that the iSWAP family, and particularly √ iSWAP, provides an advantage over CNOT as a basis gate. In this work, we show how the SNAIL natively implements n √ iSWAP functions with high-degree couplings and implementation of gates realized through proportionally scaled pulse lengths. Based on our previously demonstrated SNAIL-based quantum state router we present preliminary data extending the SNAIL-based modulator to four qubit modules. Furthermore, in this work, we co-design future SNAIL-based quantum computers that utilize the construction of richer interconnections based on classical 4-ary tree and hypercubes and compare their advantage to the traditional lattice and heavy-hex lattice for a suite of common quantum algorithms. To make our results more general, we consider both scenarios in which the total circuit time, for implementations dominated by decoherence, or total gate count, for implementations dominated by control imperfections. We demonstrate the co-design advantage based on real hardware SNAIL implementations and extrapolate to larger system sizes characterized from our real multi n √ iSWAP qubit system with 4-ary tree and hypercube inspired interconnects.
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